4.4.1-13
This commit is contained in:
Jakub Jelinek
parent
d022d11749
commit
153c32b01a
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@ -0,0 +1,516 @@
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2009-09-11 Jakub Jelinek <jakub@redhat.com>
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PR target/41175
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* config/rs6000/rs6000.c (rs6000_emit_stack_reset): Handle savres
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if sp_offset != 0 and frame_reg_rtx != sp_reg_rtx. Use gen_add3_insn
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instead of gen_addsi3.
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(rs6000_emit_epilogue): Set r11 from offsetted frame_reg_rtx instead
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sp_reg_rtx, if frame_reg_rtx is r11, adjust sp_offset. Use
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gen_add3_insn instead of gen_addsi3. Merge two adjacent ifs with the
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same condition.
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* gcc.target/powerpc/pr41175.c: New test.
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--- gcc/config/rs6000/rs6000.c.jj 2009-09-09 20:46:57.000000000 +0200
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+++ gcc/config/rs6000/rs6000.c 2009-09-11 10:29:01.101406443 +0200
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@@ -18104,8 +18104,12 @@ rs6000_emit_stack_reset (rs6000_stack_t
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if (frame_reg_rtx != sp_reg_rtx)
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{
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if (sp_offset != 0)
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- return emit_insn (gen_addsi3 (sp_reg_rtx, frame_reg_rtx,
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- GEN_INT (sp_offset)));
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+ {
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+ rtx dest_reg = savres ? gen_rtx_REG (Pmode, 11) : sp_reg_rtx;
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+
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+ return emit_insn (gen_add3_insn (dest_reg, frame_reg_rtx,
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+ GEN_INT (sp_offset)));
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+ }
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else if (!savres)
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return emit_move_insn (sp_reg_rtx, frame_reg_rtx);
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}
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@@ -19541,9 +19545,13 @@ rs6000_emit_epilogue (int sibcall)
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rs6000_emit_stack_reset (info, sp_reg_rtx, frame_reg_rtx,
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sp_offset, can_use_exit);
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else
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- emit_insn (gen_addsi3 (gen_rtx_REG (Pmode, 11),
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- sp_reg_rtx,
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- GEN_INT (sp_offset - info->fp_size)));
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+ {
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+ emit_insn (gen_add3_insn (gen_rtx_REG (Pmode, 11),
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+ frame_reg_rtx,
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+ GEN_INT (sp_offset - info->fp_size)));
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+ if (REGNO (frame_reg_rtx) == 11)
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+ sp_offset += info->fp_size;
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+ }
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par = rs6000_make_savres_rtx (info, frame_reg_rtx,
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info->gp_save_offset, reg_mode,
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@@ -19648,12 +19656,10 @@ rs6000_emit_epilogue (int sibcall)
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info->lr_save_offset + sp_offset);
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emit_move_insn (gen_rtx_REG (Pmode, 0), mem);
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+ emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
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+ gen_rtx_REG (Pmode, 0));
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}
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- if (restore_lr && !restoring_GPRs_inline)
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- emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
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- gen_rtx_REG (Pmode, 0));
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-
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/* Restore fpr's if we need to do it without calling a function. */
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if (restoring_FPRs_inline)
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for (i = 0; i < 64 - info->first_fp_reg_save; i++)
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--- gcc/testsuite/gcc.target/powerpc/pr41175.c.jj 2009-09-11 10:28:50.529527601 +0200
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+++ gcc/testsuite/gcc.target/powerpc/pr41175.c 2009-09-11 10:18:59.000000000 +0200
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@@ -0,0 +1,451 @@
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+/* PR target/41175 */
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+/* { dg-do run } */
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+/* { dg-options "-Os" } */
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+
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+#define X2(n) X1(n##0) X1(n##1)
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+#define X4(n) X2(n##0) X2(n##1)
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+#define X8(n) X4(n##0) X4(n##1)
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+
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+volatile int ll;
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+
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+__attribute__((noinline)) void
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+foo (void)
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+{
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+ asm volatile ("" : : : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+bar (char *p)
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+{
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+ asm volatile ("" : : "r" (p) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f1 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+ foo ();
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f2 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+ char *pp = __builtin_alloca (ll);
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+ bar (pp);
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f3 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f4 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X4(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
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+ foo ();
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f5 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X4(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
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+ char *pp = __builtin_alloca (ll);
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+ bar (pp);
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f6 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X4(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X4(d) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X4(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f7 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X2(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
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+ foo ();
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f8 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X2(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
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+ char *pp = __builtin_alloca (ll);
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+ bar (pp);
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f9 (void)
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+{
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+ int mem;
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+#undef X1
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+#define X1(n) int gpr##n = 0;
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+ X8(a) X8(b) X8(c)
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X2(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
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+ asm volatile ("" : X8(c) "=m" (mem) : : "memory");
|
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X2(d) "=m" (mem) : : "memory");
|
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
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+ asm volatile ("" : : X8(c) "m" (mem) : "memory");
|
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X2(d) "m" (mem) : "memory");
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+}
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+
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+__attribute__((noinline)) void
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+f10 (void)
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+{
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+ int mem;
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+#undef X1
|
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+#define X1(n) int gpr##n = 0;
|
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+ X8(a) X8(b) X4(c)
|
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+#undef X1
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+#define X1(n) double fpr##n = 0.0;
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+ X1(d)
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+#undef X1
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+#define X1(n) "+r" (gpr##n),
|
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+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
|
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+#undef X1
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+#define X1(n) "+f" (fpr##n),
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+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
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+ foo ();
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+#undef X1
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+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
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+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
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+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
|
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+#undef X1
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+#define X1(n) "f" (fpr##n),
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+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
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+}
|
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+
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+__attribute__((noinline)) void
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||||
+f11 (void)
|
||||
+{
|
||||
+ int mem;
|
||||
+#undef X1
|
||||
+#define X1(n) int gpr##n = 0;
|
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+ X8(a) X8(b) X4(c)
|
||||
+#undef X1
|
||||
+#define X1(n) double fpr##n = 0.0;
|
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+ X1(d)
|
||||
+#undef X1
|
||||
+#define X1(n) "+r" (gpr##n),
|
||||
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "+f" (fpr##n),
|
||||
+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
|
||||
+ char *pp = __builtin_alloca (ll);
|
||||
+ bar (pp);
|
||||
+#undef X1
|
||||
+#define X1(n) "r" (gpr##n),
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+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "f" (fpr##n),
|
||||
+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
|
||||
+}
|
||||
+
|
||||
+__attribute__((noinline)) void
|
||||
+f12 (void)
|
||||
+{
|
||||
+ int mem;
|
||||
+#undef X1
|
||||
+#define X1(n) int gpr##n = 0;
|
||||
+ X8(a) X8(b) X4(c)
|
||||
+#undef X1
|
||||
+#define X1(n) double fpr##n = 0.0;
|
||||
+ X1(d)
|
||||
+#undef X1
|
||||
+#define X1(n) "+r" (gpr##n),
|
||||
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X4(c) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "+f" (fpr##n),
|
||||
+ asm volatile ("" : X1(d) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "r" (gpr##n),
|
||||
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X4(c) "m" (mem) : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "f" (fpr##n),
|
||||
+ asm volatile ("" : : X1(d) "m" (mem) : "memory");
|
||||
+}
|
||||
+
|
||||
+__attribute__((noinline)) void
|
||||
+f13 (void)
|
||||
+{
|
||||
+ int mem;
|
||||
+#undef X1
|
||||
+#define X1(n) int gpr##n = 0;
|
||||
+ X8(a) X8(b) X2(c)
|
||||
+#undef X1
|
||||
+#define X1(n) double fpr##n = 0.0;
|
||||
+ X8(d)
|
||||
+#undef X1
|
||||
+#define X1(n) "+r" (gpr##n),
|
||||
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "+f" (fpr##n),
|
||||
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
|
||||
+ foo ();
|
||||
+#undef X1
|
||||
+#define X1(n) "r" (gpr##n),
|
||||
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "f" (fpr##n),
|
||||
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
|
||||
+}
|
||||
+
|
||||
+__attribute__((noinline)) void
|
||||
+f14 (void)
|
||||
+{
|
||||
+ int mem;
|
||||
+#undef X1
|
||||
+#define X1(n) int gpr##n = 0;
|
||||
+ X8(a) X8(b) X2(c)
|
||||
+#undef X1
|
||||
+#define X1(n) double fpr##n = 0.0;
|
||||
+ X8(d)
|
||||
+#undef X1
|
||||
+#define X1(n) "+r" (gpr##n),
|
||||
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "+f" (fpr##n),
|
||||
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
|
||||
+ char *pp = __builtin_alloca (ll);
|
||||
+ bar (pp);
|
||||
+#undef X1
|
||||
+#define X1(n) "r" (gpr##n),
|
||||
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "f" (fpr##n),
|
||||
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
|
||||
+}
|
||||
+
|
||||
+__attribute__((noinline)) void
|
||||
+f15 (void)
|
||||
+{
|
||||
+ int mem;
|
||||
+#undef X1
|
||||
+#define X1(n) int gpr##n = 0;
|
||||
+ X8(a) X8(b) X2(c)
|
||||
+#undef X1
|
||||
+#define X1(n) double fpr##n = 0.0;
|
||||
+ X8(d)
|
||||
+#undef X1
|
||||
+#define X1(n) "+r" (gpr##n),
|
||||
+ asm volatile ("" : X8(a) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X8(b) "=m" (mem) : : "memory");
|
||||
+ asm volatile ("" : X2(c) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "+f" (fpr##n),
|
||||
+ asm volatile ("" : X8(d) "=m" (mem) : : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "r" (gpr##n),
|
||||
+ asm volatile ("" : : X8(a) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X8(b) "m" (mem) : "memory");
|
||||
+ asm volatile ("" : : X2(c) "m" (mem) : "memory");
|
||||
+#undef X1
|
||||
+#define X1(n) "f" (fpr##n),
|
||||
+ asm volatile ("" : : X8(d) "m" (mem) : "memory");
|
||||
+}
|
||||
+
|
||||
+int
|
||||
+main ()
|
||||
+{
|
||||
+ ll = 60;
|
||||
+ f1 ();
|
||||
+ f2 ();
|
||||
+ f3 ();
|
||||
+ f4 ();
|
||||
+ f5 ();
|
||||
+ f6 ();
|
||||
+ f7 ();
|
||||
+ f8 ();
|
||||
+ f9 ();
|
||||
+ f10 ();
|
||||
+ f11 ();
|
||||
+ f12 ();
|
||||
+ f13 ();
|
||||
+ f14 ();
|
||||
+ f15 ();
|
||||
+ return 0;
|
||||
+}
|
||||
Loading…
Reference in New Issue