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Update D libphobos patch 

Incl. support for shared run-time.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
This commit is contained in:
David Abdurachmanov 2019-02-07 10:44:57 +01:00
parent 43a3db2596
commit 11a75f7499
Signed by: davidlt
GPG Key ID: 7108702C938B13C1
2 changed files with 52 additions and 22 deletions
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4
gcc.spec
View File

@ -101,7 +101,7 @@
Summary: Various compilers (C, C++, Objective-C, ...) Summary: Various compilers (C, C++, Objective-C, ...)
Name: gcc Name: gcc
Version: %{gcc_version} Version: %{gcc_version}
Release: %{gcc_release}.1.riscv64%{?dist} Release: %{gcc_release}.0.riscv64%{?dist}
# libgcc, libgfortran, libgomp, libstdc++ and crtstuff have # libgcc, libgfortran, libgomp, libstdc++ and crtstuff have
# GCC Runtime Exception. # GCC Runtime Exception.
License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions and LGPLv2+ and BSD License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions and LGPLv2+ and BSD
@ -258,7 +258,7 @@ Patch12: gcc9-pr88714.patch
Patch13: gcc9-pr89014.patch Patch13: gcc9-pr89014.patch
Patch14: gcc9-pr89093.patch Patch14: gcc9-pr89093.patch
Patch30: libphobos-enable-riscv.patch Patch30: libphobos-enable-riscv-v3.patch
Patch1000: nvptx-tools-no-ptxas.patch Patch1000: nvptx-tools-no-ptxas.patch
Patch1001: nvptx-tools-build.patch Patch1001: nvptx-tools-build.patch

70
libphobos-enable-riscv.patch → libphobos-enable-riscv-v3.patch
View File

@ -42,6 +42,38 @@ index 0b39cddb6..5a6c4b854 100644
static if (T.sizeof == ubyte.sizeof) static if (T.sizeof == ubyte.sizeof)
{ {
diff --git a/libphobos/libdruntime/rt/sections_elf_shared.d b/libphobos/libdruntime/rt/sections_elf_shared.d
index 3f43bbd76..587380522 100644
--- a/libphobos/libdruntime/rt/sections_elf_shared.d
+++ b/libphobos/libdruntime/rt/sections_elf_shared.d
@@ -10,6 +10,9 @@
module rt.sections_elf_shared;
+version (RISCV32) version = RISCV_Any;
+version (RISCV64) version = RISCV_Any;
+
version (CRuntime_Glibc) enum SharedELF = true;
else version (FreeBSD) enum SharedELF = true;
else version (NetBSD) enum SharedELF = true;
@@ -672,7 +675,16 @@ version (Shared)
if (dyn.d_tag == DT_STRTAB)
{
version (linux)
- strtab = cast(const(char)*)dyn.d_un.d_ptr;
+ {
+ // This might change in future glibc releases (after 2.29) as dynamic sections
+ // are not required to be read-only on RISC-V. This was copy & pasted from MIPS while
+ // upstreaming RISC-V support. Otherwise MIPS is the only arch which sets in glibc:
+ // #define DL_RO_DYN_SECTION 1
+ version (RISCV_Any)
+ strtab = cast(const(char)*)(info.dlpi_addr + dyn.d_un.d_ptr); // relocate
+ else
+ strtab = cast(const(char)*)dyn.d_un.d_ptr;
+ }
else version (FreeBSD)
strtab = cast(const(char)*)(info.dlpi_addr + dyn.d_un.d_ptr); // relocate
else version (NetBSD)
diff --git a/libphobos/src/std/experimental/allocator/building_blocks/region.d b/libphobos/src/std/experimental/allocator/building_blocks/region.d diff --git a/libphobos/src/std/experimental/allocator/building_blocks/region.d b/libphobos/src/std/experimental/allocator/building_blocks/region.d
index 80157aee7..ad90d17df 100644 index 80157aee7..ad90d17df 100644
--- a/libphobos/src/std/experimental/allocator/building_blocks/region.d --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
@ -57,27 +89,27 @@ index 80157aee7..ad90d17df 100644
else version (SystemZ) enum growDownwards = Yes.growDownwards; else version (SystemZ) enum growDownwards = Yes.growDownwards;
else static assert(0, "Dunno how the stack grows on this architecture."); else static assert(0, "Dunno how the stack grows on this architecture.");
diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d
index 7bb4d7c23..0cf0c311e 100644 index e98e746a8..9fe746501 100644
--- a/libphobos/src/std/math.d --- a/libphobos/src/std/math.d
+++ b/libphobos/src/std/math.d +++ b/libphobos/src/std/math.d
@@ -160,6 +160,8 @@ version (MIPS32) version = MIPS_Any; @@ -162,6 +162,8 @@ version (AArch64) version = ARM_Any;
version (MIPS64) version = MIPS_Any;
version (AArch64) version = ARM_Any;
version (ARM) version = ARM_Any; version (ARM) version = ARM_Any;
version (SPARC) version = SPARC_Any;
version (SPARC64) version = SPARC_Any;
+version (RISCV32) version = RISCV_Any; +version (RISCV32) version = RISCV_Any;
+version (RISCV64) version = RISCV_Any; +version (RISCV64) version = RISCV_Any;
version (D_InlineAsm_X86) version (D_InlineAsm_X86)
{ {
@@ -4654,6 +4656,7 @@ private: @@ -4683,6 +4685,7 @@ private:
// The Pentium SSE2 status register is 32 bits. // The Pentium SSE2 status register is 32 bits.
// The ARM and PowerPC FPSCR is a 32-bit register. // The ARM and PowerPC FPSCR is a 32-bit register.
// The SPARC FSR is a 32bit register (64 bits for SPARC 7 & 8, but high bits are uninteresting). // The SPARC FSR is a 32bit register (64 bits for SPARC 7 & 8, but high bits are uninteresting).
+ // The RISC-V (32 & 64 bit) are 32-bit register. + // The RISC-V (32 & 64 bit) fcsr is 32-bit register.
uint flags; uint flags;
version (CRuntime_Microsoft) version (CRuntime_Microsoft)
@@ -4725,6 +4728,15 @@ private: @@ -4754,6 +4757,15 @@ private:
return result; return result;
} }
} }
@ -93,23 +125,22 @@ index 7bb4d7c23..0cf0c311e 100644
else else
assert(0, "Not yet supported"); assert(0, "Not yet supported");
} }
@@ -4799,6 +4811,15 @@ private: @@ -4828,6 +4840,14 @@ private:
} }
} }
} }
+ else version (RISCV_Any) + else version (RISCV_Any)
+ { + {
+ uint oldValues = void;
+ uint newValues = 0x0; + uint newValues = 0x0;
+ asm pure nothrow @nogc + asm pure nothrow @nogc
+ { + {
+ "fsflags %0 %1" : "=r" (oldValues) : "r" (newValues); + "fsflags %0" : : "r" (newValues);
+ } + }
+ } + }
else else
assert(0, "Not yet supported"); assert(0, "Not yet supported");
} }
@@ -4968,6 +4989,10 @@ else version (PPC_Any) @@ -4987,6 +5007,10 @@ else version (PPC_Any)
{ {
version = IeeeFlagsSupport; version = IeeeFlagsSupport;
} }
@ -120,7 +151,7 @@ index 7bb4d7c23..0cf0c311e 100644
else version (MIPS_Any) else version (MIPS_Any)
{ {
version = IeeeFlagsSupport; version = IeeeFlagsSupport;
@@ -5162,6 +5187,21 @@ struct FloatingPointControl @@ -5226,6 +5250,21 @@ struct FloatingPointControl
| inexactException, | inexactException,
} }
} }
@ -139,10 +170,10 @@ index 7bb4d7c23..0cf0c311e 100644
+ | inexactException, + | inexactException,
+ } + }
+ } + }
else version (SPARC64) else version (X86_Any)
{ {
enum : ExceptionMask enum : ExceptionMask
@@ -5292,6 +5332,10 @@ private: @@ -5338,6 +5377,10 @@ private:
{ {
alias ControlState = uint; alias ControlState = uint;
} }
@ -150,10 +181,10 @@ index 7bb4d7c23..0cf0c311e 100644
+ { + {
+ alias ControlState = uint; + alias ControlState = uint;
+ } + }
else version (SPARC64) else version (X86_Any)
{ {
alias ControlState = ulong; alias ControlState = ushort;
@@ -5359,6 +5403,15 @@ private: @@ -5397,6 +5440,15 @@ private:
} }
return cont; return cont;
} }
@ -169,16 +200,15 @@ index 7bb4d7c23..0cf0c311e 100644
else else
assert(0, "Not yet supported"); assert(0, "Not yet supported");
} }
@@ -5444,6 +5497,14 @@ private: @@ -5482,6 +5534,13 @@ private:
} }
} }
} }
+ else version (RISCV_Any) + else version (RISCV_Any)
+ { + {
+ uint oldState = void;
+ asm pure nothrow @nogc + asm pure nothrow @nogc
+ { + {
+ "fscsr %0, %1;" : "=r" (oldState) : "r" (newState); + "fscsr %0" : : "r" (newState);
+ } + }
+ } + }
else else