339 lines
11 KiB
Diff
339 lines
11 KiB
Diff
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2014-08-08 Richard Henderson <rth@redhat.com>
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* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Add
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cfi_ops argument, for restore put REG_CFA_RESTORE notes into
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*cfi_ops rather than on individual insns. Cleanup.
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(aarch64_save_or_restore_callee_save_registers): Likewise.
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(aarch64_expand_prologue): Adjust caller.
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(aarch64_expand_epilogue): Likewise. Cleanup. Emit queued cfi_ops
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on the stack restore insn.
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--- gcc/config/aarch64/aarch64.c.jj 2014-07-08 17:38:17.398231989 +0200
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+++ gcc/config/aarch64/aarch64.c 2014-08-13 10:02:45.599757706 +0200
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@@ -1810,8 +1810,7 @@ aarch64_register_saved_on_entry (int reg
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static void
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aarch64_save_or_restore_fprs (int start_offset, int increment,
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- bool restore, rtx base_rtx)
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-
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+ bool restore, rtx base_rtx, rtx *cfi_ops)
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{
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unsigned regno;
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unsigned regno2;
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@@ -1819,16 +1818,16 @@ aarch64_save_or_restore_fprs (int start_
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rtx (*gen_mem_ref)(enum machine_mode, rtx)
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= (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
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-
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for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
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{
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if (aarch64_register_saved_on_entry (regno))
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{
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- rtx mem;
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+ rtx mem, reg1;
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mem = gen_mem_ref (DFmode,
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plus_constant (Pmode,
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base_rtx,
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start_offset));
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+ reg1 = gen_rtx_REG (DFmode, regno);
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for (regno2 = regno + 1;
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regno2 <= V31_REGNUM
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@@ -1840,56 +1839,51 @@ aarch64_save_or_restore_fprs (int start_
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if (regno2 <= V31_REGNUM &&
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aarch64_register_saved_on_entry (regno2))
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{
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- rtx mem2;
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+ rtx mem2, reg2;
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/* Next highest register to be saved. */
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mem2 = gen_mem_ref (DFmode,
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plus_constant
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(Pmode,
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base_rtx,
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start_offset + increment));
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+ reg2 = gen_rtx_REG (DFmode, regno2);
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+
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if (restore == false)
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{
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- insn = emit_insn
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- ( gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno),
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- mem2, gen_rtx_REG (DFmode, regno2)));
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-
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+ insn = emit_insn (gen_store_pairdf (mem, reg1, mem2, reg2));
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+ /* The first part of a frame-related parallel insn
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+ is always assumed to be relevant to the frame
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+ calculations; subsequent parts, are only
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+ frame-related if explicitly marked. */
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+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
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+ RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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{
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- insn = emit_insn
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- ( gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem,
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- gen_rtx_REG (DFmode, regno2), mem2));
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-
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- add_reg_note (insn, REG_CFA_RESTORE,
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- gen_rtx_REG (DFmode, regno));
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- add_reg_note (insn, REG_CFA_RESTORE,
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- gen_rtx_REG (DFmode, regno2));
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+ emit_insn (gen_load_pairdf (reg1, mem, reg2, mem2));
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
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}
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- /* The first part of a frame-related parallel insn
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- is always assumed to be relevant to the frame
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- calculations; subsequent parts, are only
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- frame-related if explicitly marked. */
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- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
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regno = regno2;
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start_offset += increment * 2;
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}
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else
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{
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if (restore == false)
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- insn = emit_move_insn (mem, gen_rtx_REG (DFmode, regno));
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+ {
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+ insn = emit_move_insn (mem, reg1);
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+ RTX_FRAME_RELATED_P (insn) = 1;
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+ }
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else
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{
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- insn = emit_move_insn (gen_rtx_REG (DFmode, regno), mem);
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- add_reg_note (insn, REG_CFA_RESTORE,
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- gen_rtx_REG (DImode, regno));
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+ emit_move_insn (reg1, mem);
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
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}
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start_offset += increment;
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}
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- RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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-
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}
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@@ -1897,13 +1891,14 @@ aarch64_save_or_restore_fprs (int start_
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restore's have to happen. */
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static void
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aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
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- bool restore)
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+ bool restore, rtx *cfi_ops)
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{
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rtx insn;
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rtx base_rtx = stack_pointer_rtx;
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HOST_WIDE_INT start_offset = offset;
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HOST_WIDE_INT increment = UNITS_PER_WORD;
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- rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
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+ rtx (*gen_mem_ref)(enum machine_mode, rtx)
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+ = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
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unsigned limit = (frame_pointer_needed)? R28_REGNUM: R30_REGNUM;
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unsigned regno;
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unsigned regno2;
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@@ -1912,11 +1907,13 @@ aarch64_save_or_restore_callee_save_regi
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{
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if (aarch64_register_saved_on_entry (regno))
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{
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- rtx mem;
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+ rtx mem, reg1;
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+
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mem = gen_mem_ref (Pmode,
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plus_constant (Pmode,
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base_rtx,
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start_offset));
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+ reg1 = gen_rtx_REG (DImode, regno);
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for (regno2 = regno + 1;
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regno2 <= limit
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@@ -1928,56 +1925,54 @@ aarch64_save_or_restore_callee_save_regi
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if (regno2 <= limit &&
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aarch64_register_saved_on_entry (regno2))
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{
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- rtx mem2;
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+ rtx mem2, reg2;
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/* Next highest register to be saved. */
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mem2 = gen_mem_ref (Pmode,
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plus_constant
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(Pmode,
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base_rtx,
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start_offset + increment));
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+ reg2 = gen_rtx_REG (DImode, regno2);
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+
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if (restore == false)
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{
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- insn = emit_insn
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- ( gen_store_pairdi (mem, gen_rtx_REG (DImode, regno),
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- mem2, gen_rtx_REG (DImode, regno2)));
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-
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+ insn = emit_insn (gen_store_pairdi (mem, reg1, mem2, reg2));
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+ /* The first part of a frame-related parallel insn
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+ is always assumed to be relevant to the frame
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+ calculations; subsequent parts, are only
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+ frame-related if explicitly marked. */
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+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
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+ RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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{
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- insn = emit_insn
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- ( gen_load_pairdi (gen_rtx_REG (DImode, regno), mem,
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- gen_rtx_REG (DImode, regno2), mem2));
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-
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- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
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- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2));
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+ emit_insn (gen_load_pairdi (reg1, mem, reg2, mem2));
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg2, *cfi_ops);
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}
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- /* The first part of a frame-related parallel insn
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- is always assumed to be relevant to the frame
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- calculations; subsequent parts, are only
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- frame-related if explicitly marked. */
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- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0,
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- 1)) = 1;
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regno = regno2;
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start_offset += increment * 2;
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}
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else
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{
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if (restore == false)
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- insn = emit_move_insn (mem, gen_rtx_REG (DImode, regno));
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+ {
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+ insn = emit_move_insn (mem, reg1);
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+ RTX_FRAME_RELATED_P (insn) = 1;
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+ }
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else
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{
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- insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem);
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- add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
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+ emit_move_insn (reg1, mem);
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+ *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
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}
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start_offset += increment;
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}
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- RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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- aarch64_save_or_restore_fprs (start_offset, increment, restore, base_rtx);
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-
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+ aarch64_save_or_restore_fprs (start_offset, increment, restore,
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+ base_rtx, cfi_ops);
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}
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/* AArch64 stack frames generated by this compiler look like:
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@@ -2179,7 +2174,7 @@ aarch64_expand_prologue (void)
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}
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aarch64_save_or_restore_callee_save_registers
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- (fp_offset + cfun->machine->frame.hardfp_offset, 0);
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+ (fp_offset + cfun->machine->frame.hardfp_offset, 0, NULL);
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}
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/* when offset >= 512,
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@@ -2248,15 +2243,18 @@ aarch64_expand_epilogue (bool for_sibcal
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insn = emit_insn (gen_add3_insn (stack_pointer_rtx,
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hard_frame_pointer_rtx,
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GEN_INT (- fp_offset)));
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+ /* CFA should be calculated from the value of SP from now on. */
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+ add_reg_note (insn, REG_CFA_ADJUST_CFA,
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+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
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+ plus_constant (Pmode, hard_frame_pointer_rtx,
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+ -fp_offset)));
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RTX_FRAME_RELATED_P (insn) = 1;
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- /* As SP is set to (FP - fp_offset), according to the rules in
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- dwarf2cfi.c:dwarf2out_frame_debug_expr, CFA should be calculated
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- from the value of SP from now on. */
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cfa_reg = stack_pointer_rtx;
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}
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+ rtx cfi_ops = NULL;
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aarch64_save_or_restore_callee_save_registers
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- (fp_offset + cfun->machine->frame.hardfp_offset, 1);
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+ (fp_offset + cfun->machine->frame.hardfp_offset, 1, &cfi_ops);
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/* Restore the frame pointer and lr if the frame pointer is needed. */
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if (offset > 0)
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@@ -2264,6 +2262,8 @@ aarch64_expand_epilogue (bool for_sibcal
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if (frame_pointer_needed)
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{
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rtx mem_fp, mem_lr;
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+ rtx reg_fp = hard_frame_pointer_rtx;
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+ rtx reg_lr = gen_rtx_REG (DImode, LR_REGNUM);
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if (fp_offset)
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{
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@@ -2276,52 +2276,36 @@ aarch64_expand_epilogue (bool for_sibcal
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stack_pointer_rtx,
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fp_offset
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+ UNITS_PER_WORD));
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- insn = emit_insn (gen_load_pairdi (hard_frame_pointer_rtx,
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- mem_fp,
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- gen_rtx_REG (DImode,
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- LR_REGNUM),
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- mem_lr));
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+ emit_insn (gen_load_pairdi (reg_fp, mem_fp, reg_lr, mem_lr));
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+
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+ insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
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+ GEN_INT (offset)));
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}
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else
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{
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insn = emit_insn (gen_loadwb_pairdi_di
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- (stack_pointer_rtx,
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- stack_pointer_rtx,
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- hard_frame_pointer_rtx,
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- gen_rtx_REG (DImode, LR_REGNUM),
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- GEN_INT (offset),
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+ (stack_pointer_rtx, stack_pointer_rtx,
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+ reg_fp, reg_lr, GEN_INT (offset),
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GEN_INT (GET_MODE_SIZE (DImode) + offset)));
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- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1;
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- add_reg_note (insn, REG_CFA_ADJUST_CFA,
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- (gen_rtx_SET (Pmode, stack_pointer_rtx,
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- plus_constant (Pmode, cfa_reg,
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- offset))));
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- }
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-
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- /* The first part of a frame-related parallel insn
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- is always assumed to be relevant to the frame
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- calculations; subsequent parts, are only
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- frame-related if explicitly marked. */
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- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
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- RTX_FRAME_RELATED_P (insn) = 1;
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- add_reg_note (insn, REG_CFA_RESTORE, hard_frame_pointer_rtx);
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- add_reg_note (insn, REG_CFA_RESTORE,
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- gen_rtx_REG (DImode, LR_REGNUM));
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-
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- if (fp_offset)
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- {
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- insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
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- GEN_INT (offset)));
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- RTX_FRAME_RELATED_P (insn) = 1;
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}
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+ cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg_fp, cfi_ops);
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+ cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg_lr, cfi_ops);
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}
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else
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{
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insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
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GEN_INT (offset)));
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||
|
|
- RTX_FRAME_RELATED_P (insn) = 1;
|
||
|
|
}
|
||
|
|
+ cfi_ops = alloc_reg_note (REG_CFA_ADJUST_CFA,
|
||
|
|
+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
||
|
|
+ plus_constant (Pmode, cfa_reg,
|
||
|
|
+ offset)),
|
||
|
|
+ cfi_ops);
|
||
|
|
+ REG_NOTES (insn) = cfi_ops;
|
||
|
|
+ RTX_FRAME_RELATED_P (insn) = 1;
|
||
|
|
}
|
||
|
|
+ else
|
||
|
|
+ gcc_assert (cfi_ops == NULL);
|
||
|
|
|
||
|
|
/* Stack adjustment for exception handler. */
|
||
|
|
if (crtl->calls_eh_return)
|