ffcall/ffcall-i386.patch
2017-02-24 14:34:08 -07:00

57 lines
3.4 KiB
Diff

--- common/asm-i386.hh.orig 2017-02-23 14:48:41.000000000 -0700
+++ common/asm-i386.hh 2017-02-24 14:00:27.428126212 -0700
@@ -160,6 +160,7 @@
#define MEM(base)(R(base))
#define MEM_DISP(base,displacement)displacement(R(base))
#define MEM_INDEX(base,index)(R(base),R(index))
+#define MEM_DISPINDEX(base,displacement,index) displacement(R(base),R(index))
#define MEM_SHINDEX(base,index,size)(R(base),R(index),size)
#define MEM_DISP_SHINDEX0(displacement,index,size)displacement(,R(index),size)
#define MEM_DISP_SHINDEX(base,displacement,index,size)displacement(R(base),R(index),size)
@@ -167,6 +168,7 @@
#define INSNCONC(mnemonic,size_suffix)mnemonic##size_suffix
#define INSN1(mnemonic,size_suffix,dst)INSNCONC(mnemonic,size_suffix) dst
#define INSN2(mnemonic,size_suffix,src,dst)INSNCONC(mnemonic,size_suffix) src,dst
+#define INSN3(mnemonic,size_suffix,displacement,src,dst)INSNCONC(mnemonic,size_suffix) displacement,src,dst
#define INSN2MOVX(mnemonic,size_suffix,src,dst)INSNCONC(mnemonic,size_suffix##l) src,dst
#if defined(BSD_SYNTAX) || defined(COHERENT)
#define INSN2SHCL(mnemonic,size_suffix,src,dst)INSNCONC(mnemonic,size_suffix) R(cl),src,dst
@@ -199,6 +201,7 @@
#define MEM(base) [base]
#define MEM_DISP(base,displacement) [base+(displacement)]
#define MEM_INDEX(base,index) [base+index]
+#define MEM_DISPINDEX(base,displacement,index) [base+(displacement)+index]
#define MEM_SHINDEX(base,index,size) [base+index*size]
#define MEM_DISP_SHINDEX0(displacement,index,size) [(displacement)+index*size]
#define MEM_DISP_SHINDEX(base,displacement,index,size) [base+(displacement)+index*size]
@@ -206,6 +209,7 @@
#define INSNCONC(mnemonic,suffix)mnemonic##suffix
#define INSN1(mnemonic,size_suffix,dst)mnemonic dst
#define INSN2(mnemonic,size_suffix,src,dst)mnemonic dst,src
+#define INSN3(mnemonic,size_suffix,displacement,src,dst) displacement,dst,src
#define INSN2MOVX(mnemonic,size_suffix,src,dst)INSNCONC(mnemonic,x) dst,src
#define INSN2SHCL(mnemonic,size_suffix,src,dst)mnemonic dst,src,R(cl)
#define REPZ repz
--- common/asm-i386.sh.orig 2017-02-23 14:48:41.000000000 -0700
+++ common/asm-i386.sh 2017-02-24 14:02:19.403144281 -0700
@@ -82,15 +82,17 @@ s/[(]%\(e..\)[)]/MEM(\1)/g
s/\([-+0-9A-Z_]\+\)[(],%\(e..\),\([0-9]*\)[)]/MEM_DISP_SHINDEX0(\1,\2,\3)/g
s/\([-+0-9A-Z_]\+\)[(]%\(e..\),%\(e..\),\([0-9]*\)[)]/MEM_DISP_SHINDEX(\2,\1,\3,\4)/g
s/[(]%\(e..\),%\(e..\),\([0-9]*\)[)]/MEM_SHINDEX(\1,\2,\3)/g
+s/\([-+0-9A-Z_]\+\)[(]%\(e..\),%\(e..\)[)]/MEM_DISPINDEX(\2,\1,\3)/g
s/[(]%\(e..\),%\(e..\)[)]/MEM_INDEX(\1,\2)/g
EOF
cat > $tmpscript05 << \EOF
# ----------- Introduce macro syntax for instructions
+s/\(imul\)\(.\)\([ ]\+\)\(.*\)$/INSN3(\1,\2 ,\4)/
s/\(push\|pop\|mul\|div\|not\|neg\|inc\|dec\|fld\|fstp\)\(.\)\([ ]\+\)\(.*\)$/INSN1(\1,\2 ,\4)/
-s/\(call\|jmp\|jc\|jnc\|je\|jne\|jz\|jnz\|ja\|jae\|jb\|jbe\|jl\|jge\|js\|jns\)\([ ]\+\)\(.*\)$/INSN1(\1,_ ,\3)/
+s/\(call\|jmp\|jc\|jnc\|je\|jne\|jz\|jnz\|ja\|jae\|jb\|jbe\|jl\|jle\|jg\|jge\|js\|jns\)\([ ]\+\)\(.*\)$/INSN1(\1,_ ,\3)/
s/\(movs\|movz\)\(.\)l\([ ]\+\)\(.*\)$/INSN2MOVX(\1,\2,\4)/
-s/\(mov\|add\|sub\|adc\|sbb\|xor\|test\|cmp\|rcl\|rcr\|and\|or\|sar\|shr\|shl\|lea\)\(.\)\([ ]\+\)\(.*\)$/INSN2(\1,\2 ,\4)/
+s/\([[:blank:]]\+\)\(mov\|add\|sub\|adc\|sbb\|xor\|test\|cmp\|rcl\|rcr\|and\|or\|sar\|shr\|shl\|lea\)\(.\)\([ ]\+\)\(.*\)$/\1INSN2(\2,\3 ,\5)/
s/\(shld\|shrd\)\(.\)\([ ]\+\)shcl\( \+\)\(.*\)$/INSN2SHCL(\1,\2 ,\5)/
s/rep[ ];/REP/
s/repz[ ];/REPZ/