94 lines
3.2 KiB
Diff
94 lines
3.2 KiB
Diff
--- ./callback/trampoline_r/cache-armel.c.orig 2009-04-27 10:44:13.000000000 -0600
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+++ ./callback/trampoline_r/cache-armel.c 2013-09-06 11:00:00.000000000 -0600
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@@ -12,8 +12,9 @@
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void __TR_clear_cache (char *first_addr, char *last_addr)
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{
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- register unsigned long _beg __asm ("a1") = first_addr;
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- register unsigned long _end __asm ("a2") = last_addr;
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+ register unsigned long _beg __asm ("a1") = (unsigned long) first_addr;
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+ register unsigned long _end __asm ("a2") = (unsigned long) last_addr;
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register unsigned long _flg __asm ("a3") = 0;
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- __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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+ register unsigned long _sys __asm ("r7") = __ARM_NR_cacheflush;
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+ __asm __volatile__ ("swi 0x0" : "=r" (_beg) : "0" (_beg), "r" (_end), "r" (_flg), "r" (_sys));
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}
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--- ./callback/trampoline_r/cache-armel.s.orig 2009-04-27 10:44:13.000000000 -0600
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+++ ./callback/trampoline_r/cache-armel.s 2013-09-06 13:00:00.000000000 -0600
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@@ -1,5 +1,5 @@
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- .cpu arm10tdmi
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- .fpu softvfp
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+ .arch armv7-a
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+ .fpu vfpv3-d16
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.file "cache-armel.c"
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.text
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.align 2
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@@ -9,10 +9,13 @@ __TR_clear_cache:
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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- @ lr needed for prologue
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+ str r7, [sp, #-4]!
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mov r2, #0
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+ mov r7, #2
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+ movt r7, 15
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#APP
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- swi 0x9f0002
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+ swi 0x0
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+ ldr r7, [sp], #4
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bx lr
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.size __TR_clear_cache, .-__TR_clear_cache
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- .ident "GCC: (GNU) 3.4.4 (release) (CodeSourcery ARM 2005q3-2)"
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+ .ident "GCC: (GNU) 4.8.1 20130829 (Red Hat 4.8.1-7)"
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--- ./trampoline/cache-armel.c.orig 2009-04-27 10:44:14.000000000 -0600
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+++ ./trampoline/cache-armel.c 2013-09-06 11:00:00.000000000 -0600
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@@ -12,8 +12,9 @@
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void __TR_clear_cache (char *first_addr, char *last_addr)
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{
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- register unsigned long _beg __asm ("a1") = first_addr;
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- register unsigned long _end __asm ("a2") = last_addr;
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+ register unsigned long _beg __asm ("a1") = (unsigned long) first_addr;
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+ register unsigned long _end __asm ("a2") = (unsigned long) last_addr;
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register unsigned long _flg __asm ("a3") = 0;
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- __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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+ register unsigned long _sys __asm ("r7") = __ARM_NR_cacheflush;
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+ __asm __volatile__ ("swi 0x0" : "=r" (_beg) : "0" (_beg), "r" (_end), "r" (_flg), "r" (_sys));
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}
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--- ./trampoline/cache-armel.s.orig 2009-04-27 10:44:14.000000000 -0600
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+++ ./trampoline/cache-armel.s 2013-09-06 13:00:00.000000000 -0600
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@@ -1,24 +1,21 @@
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- .cpu arm10tdmi
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- .fpu softvfp
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+ .arch armv7-a
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+ .fpu vfpv3-d16
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.file "cache-armel.c"
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.text
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.align 2
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.global __TR_clear_cache
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.type __TR_clear_cache, %function
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__TR_clear_cache:
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- @ args = 0, pretend = 0, frame = 8
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+ @ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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- sub sp, sp, #8
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- @ lr needed for prologue
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- str r0, [sp, #4]
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- str r1, [sp, #0]
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- ldr r0, [sp, #4]
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- ldr r1, [sp, #0]
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+ str r7, [sp, #-4]!
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mov r2, #0
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+ mov r7, #2
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+ movt r7, 15
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#APP
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- swi 0x9f0002
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- add sp, sp, #8
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+ swi 0x0
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+ ldr r7, [sp], #4
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bx lr
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.size __TR_clear_cache, .-__TR_clear_cache
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- .ident "GCC: (GNU) 3.4.4 (release) (CodeSourcery ARM 2005q3-2)"
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+ .ident "GCC: (GNU) 4.8.1 20130829 (Red Hat 4.8.1-7)"
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