Don't try to set the CPU or FPU. That doesn't matter and can break

the build.

ffcall-arm.patch

@@ -14,15 +14,7 @@
 +    __asm __volatile__ ("swi 0x0" : "=r" (_beg) : "0" (_beg), "r" (_end), "r" (_flg), "r" (_sys));
  }
 --- ./callback/trampoline_r/cache-armel.s.orig	2009-04-27 10:44:13.000000000 -0600
-+++ ./callback/trampoline_r/cache-armel.s	2013-09-06 11:00:00.000000000 -0600
-@@ -1,5 +1,5 @@
--	.cpu arm10tdmi
--	.fpu softvfp
-+	.cpu armv7-a
-+	.fpu vfpv3-d16
- 	.file	"cache-armel.c"
- 	.text
- 	.align	2
++++ ./callback/trampoline_r/cache-armel.s	2013-09-06 13:00:00.000000000 -0600
 @@ -9,10 +9,13 @@ __TR_clear_cache:
  	@ args = 0, pretend = 0, frame = 0
  	@ frame_needed = 0, uses_anonymous_args = 0
@@ -56,15 +48,8 @@
 +    __asm __volatile__ ("swi 0x0" : "=r" (_beg) : "0" (_beg), "r" (_end), "r" (_flg), "r" (_sys));
  }
 --- ./trampoline/cache-armel.s.orig	2009-04-27 10:44:14.000000000 -0600
-+++ ./trampoline/cache-armel.s	2013-09-06 11:00:00.000000000 -0600
-@@ -1,24 +1,21 @@
--	.cpu arm10tdmi
--	.fpu softvfp
-+	.cpu armv7-a
-+	.fpu vfpv3-d16
- 	.file	"cache-armel.c"
- 	.text
- 	.align	2
++++ ./trampoline/cache-armel.s	2013-09-06 13:00:00.000000000 -0600
+@@ -6,19 +6,16 @@
  	.global	__TR_clear_cache
  	.type	__TR_clear_cache, %function
  __TR_clear_cache: