41 lines
1.8 KiB
Diff
41 lines
1.8 KiB
Diff
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--- ./callback/trampoline_r/cache-armel.c.orig 2009-04-27 10:44:13.000000000 -0600
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+++ ./callback/trampoline_r/cache-armel.c 2013-09-04 14:40:00.000000000 -0600
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@@ -15,5 +15,5 @@ void __TR_clear_cache (char *first_addr,
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register unsigned long _beg __asm ("a1") = first_addr;
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register unsigned long _end __asm ("a2") = last_addr;
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register unsigned long _flg __asm ("a3") = 0;
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- __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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+ __asm __volatile__ ("swi 0x0f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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}
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--- ./callback/trampoline_r/cache-armel.s.orig 2009-04-27 10:44:13.000000000 -0600
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+++ ./callback/trampoline_r/cache-armel.s 2013-09-04 14:40:00.000000000 -0600
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@@ -12,7 +12,7 @@ __TR_clear_cache:
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@ lr needed for prologue
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mov r2, #0
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#APP
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- swi 0x9f0002
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+ swi 0x0f0002
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bx lr
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.size __TR_clear_cache, .-__TR_clear_cache
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.ident "GCC: (GNU) 3.4.4 (release) (CodeSourcery ARM 2005q3-2)"
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--- ./trampoline/cache-armel.c.orig 2009-04-27 10:44:14.000000000 -0600
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+++ ./trampoline/cache-armel.c 2013-09-04 14:40:00.000000000 -0600
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@@ -15,5 +15,5 @@ void __TR_clear_cache (char *first_addr,
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register unsigned long _beg __asm ("a1") = first_addr;
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register unsigned long _end __asm ("a2") = last_addr;
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register unsigned long _flg __asm ("a3") = 0;
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- __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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+ __asm __volatile__ ("swi 0x0f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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}
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--- ./trampoline/cache-armel.s.orig 2009-04-27 10:44:14.000000000 -0600
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+++ ./trampoline/cache-armel.s 2013-09-04 14:40:00.000000000 -0600
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@@ -17,7 +17,7 @@ __TR_clear_cache:
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ldr r1, [sp, #0]
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mov r2, #0
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#APP
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- swi 0x9f0002
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+ swi 0x0f0002
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add sp, sp, #8
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bx lr
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.size __TR_clear_cache, .-__TR_clear_cache
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