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Add support for IBM's power-11 architecture extensions.

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This commit is contained in:
Nick Clifton 2024-02-12 10:50:09 +00:00
parent d43bbe0fb5
commit f5eacb8b02
2 changed files with 91 additions and 1 deletions
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83
binutils-power-11.patch Normal file
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@ -0,0 +1,83 @@
diff -rup binutils,orig/binutils/doc/binutils.texi binutils-2.41/binutils/doc/binutils.texi
--- binutils,orig/binutils/doc/binutils.texi 2024-02-12 10:03:46.609677213 +0000
+++ binutils-2.41/binutils/doc/binutils.texi 2024-02-12 10:03:55.976681219 +0000
@@ -2651,11 +2651,12 @@ rather than @code{li}. All of the @opti
@option{e300}, @option{e500}, @option{e500mc}, @option{e500mc64},
@option{e500x2}, @option{e5500}, @option{e6500}, @option{efs},
@option{power4}, @option{power5}, @option{power6}, @option{power7},
-@option{power8}, @option{power9}, @option{power10}, @option{ppc},
-@option{ppc32}, @option{ppc64}, @option{ppc64bridge}, @option{ppcps},
-@option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5}, @option{pwr5x},
-@option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9}, @option{pwr10},
-@option{pwrx}, @option{titan}, @option{vle}, and @option{future}.
+@option{power8}, @option{power9}, @option{power10}, @option{power11},
+@option{ppc}, @option{ppc32}, @option{ppc64}, @option{ppc64bridge},
+@option{ppcps}, @option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5},
+@option{pwr5x}, @option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9},
+@option{pwr10}, @option{pwr11}, @option{pwrx}, @option{titan}, @option{vle},
+and @option{future}.
@option{32} and @option{64} modify the default or a prior CPU
selection, disabling and enabling 64-bit insns respectively. In
addition, @option{altivec}, @option{any}, @option{lsp}, @option{htm},
Only in binutils-2.41/binutils/doc: binutils.texi.orig
diff -rup binutils,orig/gas/config/tc-ppc.c binutils-2.41/gas/config/tc-ppc.c
--- binutils,orig/gas/config/tc-ppc.c 2024-02-12 10:03:46.742677270 +0000
+++ binutils-2.41/gas/config/tc-ppc.c 2024-02-12 10:03:55.977681219 +0000
@@ -1392,6 +1392,8 @@ PowerPC options:\n"));
fprintf (stream, _("\
-mpower10, -mpwr10 generate code for Power10 architecture\n"));
fprintf (stream, _("\
+-mpower11, -mpwr11 generate code for Power11 architecture\n"));
+ fprintf (stream, _("\
-mlibresoc generate code for Libre-SOC architecture\n"));
fprintf (stream, _("\
-mfuture generate code for 'future' architecture\n"));
diff -rup binutils,orig/gas/doc/c-ppc.texi binutils-2.41/gas/doc/c-ppc.texi
--- binutils,orig/gas/doc/c-ppc.texi 2024-02-12 10:03:46.783677288 +0000
+++ binutils-2.41/gas/doc/c-ppc.texi 2024-02-12 10:03:55.977681219 +0000
@@ -156,6 +156,9 @@ Generate code for Power9 architecture.
@item -mpower10, -mpwr10
Generate code for Power10 architecture.
+@item -mpower11, -mpwr11
+Generate code for Power11 architecture.
+
@item -mfuture
Generate code for 'future' architecture.
diff -rup binutils,orig/opcodes/ppc-dis.c binutils-2.41/opcodes/ppc-dis.c
--- binutils,orig/opcodes/ppc-dis.c 2024-02-12 10:03:47.836677739 +0000
+++ binutils-2.41/opcodes/ppc-dis.c 2024-02-12 10:03:55.977681219 +0000
@@ -208,6 +208,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
+ { "power11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
{ "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
@@ -267,6 +272,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
+ { "pwr11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
0 },
{ "raw", PPC_OPCODE_PPC,
@@ -396,7 +406,7 @@ powerpc_init_dialect (struct disassemble
break;
default:
if (info->arch == bfd_arch_powerpc)
- dialect = ppc_parse_cpu (dialect, &sticky, "power10") | PPC_OPCODE_ANY;
+ dialect = ppc_parse_cpu (dialect, &sticky, "power11") | PPC_OPCODE_ANY;
else
dialect = ppc_parse_cpu (dialect, &sticky, "pwr");
break;

9
binutils.spec
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@ -2,7 +2,7 @@
Summary: A GNU collection of binary utilities
Name: binutils%{?_with_debug:-debug}
Version: 2.41
Release: 32%{?dist}
Release: 33%{?dist}
License: GPL-3.0-or-later AND (GPL-3.0-or-later WITH Bison-exception-2.2) AND (LGPL-2.0-or-later WITH GCC-exception-2.0) AND BSD-3-Clause AND GFDL-1.3-or-later AND GPL-2.0-or-later AND LGPL-2.1-or-later AND LGPL-2.0-or-later
URL: https://sourceware.org/binutils
@ -319,6 +319,10 @@ Patch35: binutils-demangler-updates.patch
# Lifetime: Fixed in 2.42
Patch36: binutils-Intel-APX-part-1.patch
# Purpose: Add support for IBM's Power11 architecture extensions
# Lifetime: Fixed in 2.43
Patch37: binutils-power-11.patch
# Purpose: Suppress the x86 linker's p_align-1 tests due to kernel bug on CentOS-10
# Lifetime: TEMPORARY
Patch99: binutils-suppress-ld-align-tests.patch
@ -1358,6 +1362,9 @@ exit 0
#----------------------------------------------------------------------------
%changelog
* Mon Feb 12 2024 Nick Clifton <nickc@redhat.com> - 2.41-33
- Add support for IBM's power-11 architecture extensions.
* Wed Jan 24 2024 Nick Clifton <nickc@redhat.com> - 2.41-32
- Suppress the x86 linker's p_align-1 tests in order to cope with a CentOS-10 kernel bug. (RHEL-22466)