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delete unused patches.

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This commit is contained in:
Nick Clifton 2014-03-26 17:05:26 +00:00
parent 4dda3faefd
commit bce7d118b1
15 changed files with 0 additions and 2656 deletions
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248
binutils-2.23.2-arm-add-float-abi-to-e_flags.patch
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@ -1,248 +0,0 @@
commit cd49363b8ae1725522ea29ccc0dda7b138f3d5aa
Author: Nick Clifton <nickc@redhat.com>
Date: Tue Oct 30 12:44:53 2012 +0000
bfd:
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -12110,6 +12110,15 @@ elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
case EF_ARM_EABI_VER5:
fprintf (file, _(" [Version5 EABI]"));
+
+ if (flags & EF_ARM_ABI_FLOAT_SOFT)
+ fprintf (file, _(" [soft-float ABI]"));
+
+ if (flags & EF_ARM_ABI_FLOAT_HARD)
+ fprintf (file, _(" [hard-float ABI]"));
+
+ flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
+
eabi:
if (flags & EF_ARM_BE8)
fprintf (file, _(" [BE8]"));
@@ -14417,6 +14426,16 @@ elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATT
if (globals != NULL && globals->byteswap_code)
i_ehdrp->e_flags |= EF_ARM_BE8;
}
+
+ if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
+ && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
+ {
+ int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
+ if (abi)
+ i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
+ else
+ i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
+ }
}
static enum elf_reloc_type_class
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -2122,11 +2134,34 @@ decode_ARM_machine_flags (unsigned e_flags, char buf[])
case EF_ARM_EABI_VER4:
strcat (buf, ", Version4 EABI");
- goto eabi;
+ while (e_flags)
+ {
+ unsigned flag;
+
+ /* Process flags one bit at a time. */
+ flag = e_flags & - e_flags;
+ e_flags &= ~ flag;
+
+ switch (flag)
+ {
+ case EF_ARM_BE8:
+ strcat (buf, ", BE8");
+ break;
+
+ case EF_ARM_LE8:
+ strcat (buf, ", LE8");
+ break;
+
+ default:
+ unknown = 1;
+ break;
+ }
+ break;
+ }
+ break;
case EF_ARM_EABI_VER5:
strcat (buf, ", Version5 EABI");
- eabi:
while (e_flags)
{
unsigned flag;
@@ -2145,6 +2180,14 @@ decode_ARM_machine_flags (unsigned e_flags, char buf[])
strcat (buf, ", LE8");
break;
+ case EF_ARM_ABI_FLOAT_SOFT: /* Conflicts with EF_ARM_SOFT_FLOAT. */
+ strcat (buf, ", soft-float ABI");
+ break;
+
+ case EF_ARM_ABI_FLOAT_HARD: /* Conflicts with EF_ARM_VFP_FLOAT. */
+ strcat (buf, ", hard-float ABI");
+ break;
+
default:
unknown = 1;
break;
diff --git a/elfcpp/arm.h b/elfcpp/arm.h
index cb85eeb..ab0618a 100644
--- a/elfcpp/arm.h
+++ b/elfcpp/arm.h
@@ -1,6 +1,6 @@
// arm.h -- ELF definitions specific to EM_ARM -*- C++ -*-
-// Copyright 2009, Free Software Foundation, Inc.
+// Copyright 2009, 2012 Free Software Foundation, Inc.
// Written by Doug Kwan <dougkwan@google.com>.
// This file is part of elfcpp.
@@ -222,6 +222,14 @@ inline Elf_Word
arm_eabi_version(Elf_Word flags)
{ return flags & EF_ARM_EABIMASK; }
+// EABI_VER5 e_flags values for identifying soft- and hard-float ABI
+// choice.
+enum
+{
+ EF_ARM_ABI_FLOAT_SOFT = 0x200,
+ EF_ARM_ABI_FLOAT_HARD = 0x400,
+};
+
// Values for the Tag_CPU_arch EABI attribute.
enum
{
diff --git a/gold/arm.cc b/gold/arm.cc
index d847126..5770c8a 100644
--- a/gold/arm.cc
+++ b/gold/arm.cc
@@ -2476,7 +2476,7 @@ class Target_arm : public Sized_target<32, big_endian>
{ return new Arm_output_section<big_endian>(name, type, flags); }
void
- do_adjust_elf_header(unsigned char* view, int len) const;
+ do_adjust_elf_header(unsigned char* view, int len);
// We only need to generate stubs, and hence perform relaxation if we are
// not doing relocatable linking.
@@ -10016,15 +10016,16 @@ template<bool big_endian>
void
Target_arm<big_endian>::do_adjust_elf_header(
unsigned char* view,
- int len) const
+ int len)
{
gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
elfcpp::Ehdr<32, big_endian> ehdr(view);
+ elfcpp::Elf_Word flags = this->processor_specific_flags();
unsigned char e_ident[elfcpp::EI_NIDENT];
memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
- if (elfcpp::arm_eabi_version(this->processor_specific_flags())
+ if (elfcpp::arm_eabi_version(flags)
== elfcpp::EF_ARM_EABI_UNKNOWN)
e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
else
@@ -10033,6 +10034,21 @@ Target_arm<big_endian>::do_adjust_elf_header(
// FIXME: Do EF_ARM_BE8 adjustment.
+ // If we're working in EABI_VER5, set the hard/soft float ABI flags
+ // as appropriate.
+ if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
+ {
+ elfcpp::Elf_Half type = ehdr.get_e_type();
+ if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
+ {
+ Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
+ if (attr->int_value())
+ flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
+ else
+ flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
+ this->set_processor_specific_flags(flags);
+ }
+ }
elfcpp::Ehdr_write<32, big_endian> oehdr(view);
oehdr.put_e_ident(e_ident);
}
diff --git a/include/elf/arm.h b/include/elf/arm.h
index 8ea3fe8..d799303 100644
--- a/include/elf/arm.h
+++ b/include/elf/arm.h
@@ -46,6 +46,11 @@
#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT. */
#define EF_ARM_EABIMASK 0xFF000000
+/* New constants defined in the ARM ELF spec. version XXX.
+ Only valid in conjunction with EF_ARM_EABI_VER5. */
+#define EF_ARM_ABI_FLOAT_SOFT 0x200 /* NB conflicts with EF_ARM_SOFT_FLOAT. */
+#define EF_ARM_ABI_FLOAT_HARD 0x400 /* NB conflicts with EF_ARM_VFP_FLOAT. */
+
/* Constants defined in AAELF. */
#define EF_ARM_BE8 0x00800000
#define EF_ARM_LE8 0x00400000
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 8e15ffe..81ee0bd 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -271,6 +271,21 @@ set armelftests_common {
{"Simple non-PIC shared library (no PLT check)" "-shared" "" {arm-lib.s}
{{objdump -Rw arm-lib.r}}
"arm-lib.so"}
+ {"EABI soft-float ET_EXEC ABI flag" "-T arm.ld" "-mfloat-abi=soft -meabi=5" {eabi-soft-float.s}
+ {{readelf -h eabi-soft-float.d}}
+ "eabi-soft-float"}
+ {"EABI hard-float ET_EXEC ABI flag" "-T arm.ld" "-mfloat-abi=hard -meabi=5" {eabi-hard-float.s}
+ {{readelf -h eabi-hard-float.d}}
+ "eabi-hard-float"}
+ {"EABI hard-float ET_DYN ABI flag" "-shared" "-mfloat-abi=hard -meabi=5" {eabi-hard-float.s}
+ {{readelf -h eabi-hard-float.d}}
+ "eabi-hard-float.so"}
+ {"EABI ABI flags wrong ABI version" "-T arm.ld" "-mfloat-abi=soft -meabi=4" {eabi-soft-float.s}
+ {{readelf -h eabi-soft-float-ABI4.d}}
+ "eabi-soft-float-no-flags"}
+ {"EABI ABI flags ld -r" "-r" "-mfloat-abi=soft -meabi=5" {eabi-soft-float.s}
+ {{readelf -h eabi-soft-float-r.d}}
+ "eabi-soft-float-r.o"}
}
set armelftests_nonacl {

36
binutils-2.23.2-bfd-texinfo-fixes.patch
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@ -1,36 +0,0 @@
*** ../binutils-2.23.2.orig/bfd/doc/bfd.texinfo 2013-05-17 08:53:44.811925730 +0100
--- bfd/doc/bfd.texinfo 2013-05-17 08:58:10.712933101 +0100
*************** All of BFD lives in one directory.
*** 322,328 ****
@printindex cp
@tex
! % I think something like @colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
--- 322,328 ----
@printindex cp
@tex
! % I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
*************** All of BFD lives in one directory.
*** 333,339 ****
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
! % Blame: doc@cygnus.com, 28mar91.
@end tex
@bye
--- 333,339 ----
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
! % Blame: doc@@cygnus.com, 28mar91.
@end tex
@bye

610
binutils-2.23.2-dwz-alt-debuginfo.patch
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@ -1,610 +0,0 @@
diff -rcp ../binutils-2.23.2.orig/bfd/bfd-in2.h bfd/bfd-in2.h
*** ../binutils-2.23.2.orig/bfd/bfd-in2.h 2013-05-29 15:56:00.512051112 +0100
--- bfd/bfd-in2.h 2013-05-29 15:58:54.994055949 +0100
*************** void *bfd_zalloc (bfd *abfd, bfd_size_ty
*** 1042,1049 ****
--- 1042,1053 ----
unsigned long bfd_calc_gnu_debuglink_crc32
(unsigned long crc, const unsigned char *buf, bfd_size_type len);
+ char *bfd_get_alt_debug_link_info (bfd *abfd, unsigned long *crc32_out);
+
char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
+ char *bfd_follow_gnu_debugaltlink (bfd *abfd, const char *dir);
+
struct bfd_section *bfd_create_gnu_debuglink_section
(bfd *abfd, const char *filename);
diff -rcp ../binutils-2.23.2.orig/bfd/dwarf2.c bfd/dwarf2.c
*** ../binutils-2.23.2.orig/bfd/dwarf2.c 2013-05-29 15:56:00.296051106 +0100
--- bfd/dwarf2.c 2013-05-29 16:00:03.490057848 +0100
*************** struct dwarf2_debug
*** 108,113 ****
--- 108,123 ----
asection *sec;
bfd_byte *sec_info_ptr;
+ /* Support for alternate debug info sections created by the DWZ utility:
+ This includes a pointer to an alternate bfd which contains *extra*,
+ possibly duplicate debug sections, and pointers to the loaded
+ .debug_str and .debug_info sections from this bfd. */
+ bfd * alt_bfd_ptr;
+ bfd_byte * alt_dwarf_str_buffer;
+ bfd_size_type alt_dwarf_str_size;
+ bfd_byte * alt_dwarf_info_buffer;
+ bfd_size_type alt_dwarf_info_size;
+
/* A pointer to the memory block allocated for info_ptr. Neither
info_ptr nor sec_info_ptr are guaranteed to stay pointing to the
beginning of the malloc block. This is used only to free the
*************** const struct dwarf_debug_section dwarf_d
*** 287,292 ****
--- 297,303 ----
{ ".debug_aranges", ".zdebug_aranges" },
{ ".debug_frame", ".zdebug_frame" },
{ ".debug_info", ".zdebug_info" },
+ { ".debug_info", ".zdebug_info" },
{ ".debug_line", ".zdebug_line" },
{ ".debug_loc", ".zdebug_loc" },
{ ".debug_macinfo", ".zdebug_macinfo" },
*************** const struct dwarf_debug_section dwarf_d
*** 297,302 ****
--- 308,314 ----
{ ".debug_static_func", ".zdebug_static_func" },
{ ".debug_static_vars", ".zdebug_static_vars" },
{ ".debug_str", ".zdebug_str", },
+ { ".debug_str", ".zdebug_str", },
{ ".debug_types", ".zdebug_types" },
/* GNU DWARF 1 extensions */
{ ".debug_sfnames", ".zdebug_sfnames" },
*************** const struct dwarf_debug_section dwarf_d
*** 309,320 ****
--- 321,335 ----
{ NULL, NULL },
};
+ /* NB/ Numbers in this enum must match up with indicies
+ into the dwarf_debug_sections[] array above. */
enum dwarf_debug_section_enum
{
debug_abbrev = 0,
debug_aranges,
debug_frame,
debug_info,
+ debug_info_alt,
debug_line,
debug_loc,
debug_macinfo,
*************** enum dwarf_debug_section_enum
*** 325,330 ****
--- 340,346 ----
debug_static_func,
debug_static_vars,
debug_str,
+ debug_str_alt,
debug_types,
debug_sfnames,
debug_srcinfo,
*************** read_section (bfd * abfd,
*** 481,488 ****
asection *msec;
const char *section_name = sec->uncompressed_name;
! /* read_section is a noop if the section has already been read. */
! if (!*section_buffer)
{
msec = bfd_get_section_by_name (abfd, section_name);
if (! msec)
--- 497,504 ----
asection *msec;
const char *section_name = sec->uncompressed_name;
! /* The section may have already been read. */
! if (*section_buffer == NULL)
{
msec = bfd_get_section_by_name (abfd, section_name);
if (! msec)
*************** read_indirect_string (struct comp_unit *
*** 623,628 ****
--- 639,742 ----
return str;
}
+ /* Like read_indirect_string but uses a .debug_str located in
+ an alternate filepointed to by the .gnu_debuglink section.
+ Used to impement DW_FORM_GNU_strp_alt. */
+
+ static char *
+ read_alt_indirect_string (struct comp_unit * unit,
+ bfd_byte * buf,
+ unsigned int * bytes_read_ptr)
+ {
+ bfd_uint64_t offset;
+ struct dwarf2_debug *stash = unit->stash;
+ char *str;
+
+ if (unit->offset_size == 4)
+ offset = read_4_bytes (unit->abfd, buf);
+ else
+ offset = read_8_bytes (unit->abfd, buf);
+
+ *bytes_read_ptr = unit->offset_size;
+
+ if (stash->alt_bfd_ptr == NULL)
+ {
+ bfd * debug_bfd;
+ char * debug_filename = bfd_follow_gnu_debugaltlink (unit->abfd, DEBUGDIR);
+
+ if (debug_filename == NULL)
+ return NULL;
+
+ if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL
+ || ! bfd_check_format (debug_bfd, bfd_object))
+ {
+ if (debug_bfd)
+ bfd_close (debug_bfd);
+
+ /* FIXME: Should we report our failure to follow the debuglink ? */
+ free (debug_filename);
+ return NULL;
+ }
+ stash->alt_bfd_ptr = debug_bfd;
+ }
+
+ if (! read_section (unit->stash->alt_bfd_ptr,
+ stash->debug_sections + debug_str_alt,
+ NULL, /* FIXME: Do we need to load alternate symbols ? */
+ offset,
+ &stash->alt_dwarf_str_buffer,
+ &stash->alt_dwarf_str_size))
+ return NULL;
+
+ str = (char *) stash->alt_dwarf_str_buffer + offset;
+ if (*str == '\0')
+ return NULL;
+
+ return str;
+ }
+
+ /* Resolve an alternate reference from UNIT at OFFSET.
+ Returns a pointer into the loaded alternate CU upon success
+ or NULL upon failure. */
+
+ static bfd_byte *
+ read_alt_indirect_ref (struct comp_unit * unit,
+ bfd_uint64_t offset)
+ {
+ struct dwarf2_debug *stash = unit->stash;
+
+ if (stash->alt_bfd_ptr == NULL)
+ {
+ bfd * debug_bfd;
+ char * debug_filename = bfd_follow_gnu_debugaltlink (unit->abfd, DEBUGDIR);
+
+ if (debug_filename == NULL)
+ return FALSE;
+
+ if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL
+ || ! bfd_check_format (debug_bfd, bfd_object))
+ {
+ if (debug_bfd)
+ bfd_close (debug_bfd);
+
+ /* FIXME: Should we report our failure to follow the debuglink ? */
+ free (debug_filename);
+ return NULL;
+ }
+ stash->alt_bfd_ptr = debug_bfd;
+ }
+
+ if (! read_section (unit->stash->alt_bfd_ptr,
+ stash->debug_sections + debug_info_alt,
+ NULL, /* FIXME: Do we need to load alternate symbols ? */
+ offset,
+ &stash->alt_dwarf_info_buffer,
+ &stash->alt_dwarf_info_size))
+ return NULL;
+
+ return stash->alt_dwarf_info_buffer + offset;
+ }
+
static bfd_uint64_t
read_address (struct comp_unit *unit, bfd_byte *buf)
{
*************** read_attribute_value (struct attribute *
*** 826,831 ****
--- 940,946 ----
attr->u.val = read_address (unit, info_ptr);
info_ptr += unit->addr_size;
break;
+ case DW_FORM_GNU_ref_alt:
case DW_FORM_sec_offset:
if (unit->offset_size == 4)
attr->u.val = read_4_bytes (unit->abfd, info_ptr);
*************** read_attribute_value (struct attribute *
*** 875,880 ****
--- 990,999 ----
attr->u.str = read_indirect_string (unit, info_ptr, &bytes_read);
info_ptr += bytes_read;
break;
+ case DW_FORM_GNU_strp_alt:
+ attr->u.str = read_alt_indirect_string (unit, info_ptr, &bytes_read);
+ info_ptr += bytes_read;
+ break;
case DW_FORM_exprloc:
case DW_FORM_block:
amt = sizeof (struct dwarf_block);
*************** find_abstract_instance_name (struct comp
*** 2006,2011 ****
--- 2125,2141 ----
info_ptr = unit->sec_info_ptr + die_ref;
}
+ else if (attr_ptr->form == DW_FORM_GNU_ref_alt)
+ {
+ info_ptr = read_alt_indirect_ref (unit, die_ref);
+ if (info_ptr == NULL)
+ {
+ (*_bfd_error_handler)
+ (_("Dwarf Error: Unable to read alt ref %u."), die_ref);
+ bfd_set_error (bfd_error_bad_value);
+ return name;
+ }
+ }
else
info_ptr = unit->info_ptr_unit + die_ref;
abbrev_number = read_unsigned_leb128 (abfd, info_ptr, &bytes_read);
*************** _bfd_dwarf2_cleanup_debug_info (bfd *abf
*** 3720,3723 ****
--- 3850,3859 ----
free (stash->dwarf_ranges_buffer);
if (stash->info_ptr_memory)
free (stash->info_ptr_memory);
+ if (stash->alt_dwarf_str_buffer)
+ free (stash->alt_dwarf_str_buffer);
+ if (stash->alt_dwarf_info_buffer)
+ free (stash->alt_dwarf_info_buffer);
+ if (stash->alt_bfd_ptr)
+ bfd_close (stash->alt_bfd_ptr);
}
diff -rcp ../binutils-2.23.2.orig/bfd/opncls.c bfd/opncls.c
*** ../binutils-2.23.2.orig/bfd/opncls.c 2013-05-29 15:55:59.990051098 +0100
--- bfd/opncls.c 2013-05-29 16:01:00.052059415 +0100
*************** bfd_release (bfd *abfd, void *block)
*** 1056,1065 ****
This facilitates "optional" provision of debugging information, without
having to provide two complete copies of every binary object (with and
! without debug symbols).
! */
- #define GNU_DEBUGLINK ".gnu_debuglink"
/*
FUNCTION
bfd_calc_gnu_debuglink_crc32
--- 1056,1066 ----
This facilitates "optional" provision of debugging information, without
having to provide two complete copies of every binary object (with and
! without debug symbols). */
!
! #define GNU_DEBUGLINK ".gnu_debuglink"
! #define GNU_DEBUGALTLINK ".gnu_debugaltlink"
/*
FUNCTION
bfd_calc_gnu_debuglink_crc32
*************** get_debug_link_info (bfd *abfd, unsigned
*** 1195,1200 ****
--- 1196,1249 ----
}
/*
+ FUNCTION
+ bfd_get_alt_debug_link_info
+
+ SYNOPSIS
+ char *bfd_get_alt_debug_link_info (bfd *abfd, unsigned long *crc32_out);
+
+ DESCRIPTION
+ Fetch the filename and BuildID value for any alternate debuginfo
+ associated with @var{abfd}. Return NULL if no such info found,
+ otherwise return filename and update @var{buildid_out}. The
+ returned filename is allocated with @code{malloc}; freeing it
+ is the responsibility of the caller.
+ */
+
+ char *
+ bfd_get_alt_debug_link_info (bfd * abfd, unsigned long * buildid_out)
+ {
+ asection *sect;
+ bfd_byte *contents;
+ int buildid_offset;
+ char *name;
+
+ BFD_ASSERT (abfd);
+ BFD_ASSERT (buildid_out);
+
+ sect = bfd_get_section_by_name (abfd, GNU_DEBUGALTLINK);
+
+ if (sect == NULL)
+ return NULL;
+
+ if (!bfd_malloc_and_get_section (abfd, sect, & contents))
+ {
+ if (contents != NULL)
+ free (contents);
+ return NULL;
+ }
+
+ /* BuildID value is stored after the filename, aligned up to 4 bytes. */
+ name = (char *) contents;
+ buildid_offset = strlen (name) + 1;
+ buildid_offset = (buildid_offset + 3) & ~3;
+
+ * buildid_out = bfd_get_32 (abfd, contents + buildid_offset);
+
+ return name;
+ }
+
+ /*
INTERNAL_FUNCTION
separate_debug_file_exists
*************** separate_debug_file_exists (const char *
*** 1229,1234 ****
--- 1278,1314 ----
return crc == file_crc;
}
+ /*
+ INTERNAL_FUNCTION
+ separate_alt_debug_file_exists
+
+ SYNOPSIS
+ bfd_boolean separate_alt_debug_file_exists
+ (char *name, unsigned long crc32);
+
+ DESCRIPTION
+ Checks to see if @var{name} is a file and if its BuildID
+ matches @var{buildid}.
+ */
+
+ static bfd_boolean
+ separate_alt_debug_file_exists (const char *name,
+ const unsigned long buildid ATTRIBUTE_UNUSED)
+ {
+ FILE *f;
+
+ BFD_ASSERT (name);
+
+ f = real_fopen (name, FOPEN_RB);
+ if (f == NULL)
+ return FALSE;
+
+ /* FIXME: Add code to check buildid. */
+
+ fclose (f);
+
+ return TRUE;
+ }
/*
INTERNAL_FUNCTION
*************** SYNOPSIS
*** 1238,1253 ****
char *find_separate_debug_file (bfd *abfd);
DESCRIPTION
! Searches @var{abfd} for a reference to separate debugging
! information, scans various locations in the filesystem, including
! the file tree rooted at @var{debug_file_directory}, and returns a
! filename of such debugging information if the file is found and has
! matching CRC32. Returns NULL if no reference to debugging file
! exists, or file cannot be found.
*/
static char *
! find_separate_debug_file (bfd *abfd, const char *debug_file_directory)
{
char *base;
char *dir;
--- 1318,1341 ----
char *find_separate_debug_file (bfd *abfd);
DESCRIPTION
! Searches @var{abfd} for a section called @var{section_name} which
! is expected to contain a reference to a file containing separate
! debugging information. The function scans various locations in
! the filesystem, including the file tree rooted at
! @var{debug_file_directory}, and returns the first matching
! filename that it finds. If @var{check_crc} is TRUE then the
! contents of the file must also match the CRC value contained in
! @var{section_name}. Returns NULL if no valid file could be found.
*/
+ typedef char * (* get_func_type) (bfd *, unsigned long *);
+ typedef bfd_boolean (* check_func_type) (const char *, const unsigned long);
+
static char *
! find_separate_debug_file (bfd * abfd,
! const char * debug_file_directory,
! get_func_type get_func,
! check_func_type check_func)
{
char *base;
char *dir;
*************** find_separate_debug_file (bfd *abfd, con
*** 1268,1274 ****
return NULL;
}
! base = get_debug_link_info (abfd, & crc32);
if (base == NULL)
return NULL;
--- 1356,1362 ----
return NULL;
}
! base = get_func (abfd, & crc32);
if (base == NULL)
return NULL;
*************** find_separate_debug_file (bfd *abfd, con
*** 1309,1345 ****
+ strlen (base)
+ 1);
if (debugfile == NULL)
! {
! free (base);
! free (dir);
! free (canon_dir);
! return NULL;
! }
/* First try in the same directory as the original file: */
strcpy (debugfile, dir);
strcat (debugfile, base);
! if (separate_debug_file_exists (debugfile, crc32))
! {
! free (base);
! free (dir);
! free (canon_dir);
! return debugfile;
! }
/* Then try in a subdirectory called .debug. */
strcpy (debugfile, dir);
strcat (debugfile, ".debug/");
strcat (debugfile, base);
! if (separate_debug_file_exists (debugfile, crc32))
! {
! free (base);
! free (dir);
! free (canon_dir);
! return debugfile;
! }
/* Then try in the global debug dir for Fedora libraries. */
sprintf (debugfile, "%s%s%s", FEDORA_LIB_DEBUG_DIR, dir, base);
--- 1397,1418 ----
+ strlen (base)
+ 1);
if (debugfile == NULL)
! goto found; /* Actually this returns NULL. */
/* First try in the same directory as the original file: */
strcpy (debugfile, dir);
strcat (debugfile, base);
! if (check_func (debugfile, crc32))
! goto found;
/* Then try in a subdirectory called .debug. */
strcpy (debugfile, dir);
strcat (debugfile, ".debug/");
strcat (debugfile, base);
! if (check_func (debugfile, crc32))
! goto found;
/* Then try in the global debug dir for Fedora libraries. */
sprintf (debugfile, "%s%s%s", FEDORA_LIB_DEBUG_DIR, dir, base);
*************** find_separate_debug_file (bfd *abfd, con
*** 1371,1389 ****
strcat (debugfile, canon_dir);
strcat (debugfile, base);
! if (separate_debug_file_exists (debugfile, crc32))
! {
! free (base);
! free (dir);
! free (canon_dir);
! return debugfile;
! }
free (debugfile);
free (base);
free (dir);
free (canon_dir);
! return NULL;
}
--- 1444,1461 ----
strcat (debugfile, canon_dir);
strcat (debugfile, base);
! if (check_func (debugfile, crc32))
! goto found;
+ /* Failed to find the file. */
free (debugfile);
+ debugfile = NULL;
+
+ found:
free (base);
free (dir);
free (canon_dir);
! return debugfile;
}
*************** RETURNS
*** 1416,1422 ****
char *
bfd_follow_gnu_debuglink (bfd *abfd, const char *dir)
{
! return find_separate_debug_file (abfd, dir);
}
/*
--- 1488,1530 ----
char *
bfd_follow_gnu_debuglink (bfd *abfd, const char *dir)
{
! return find_separate_debug_file (abfd, dir,
! get_debug_link_info,
! separate_debug_file_exists);
! }
!
! /*
! FUNCTION
! bfd_follow_gnu_debugaltlink
!
! SYNOPSIS
! char *bfd_follow_gnu_debugaltlink (bfd *abfd, const char *dir);
!
! DESCRIPTION
!
! Takes a BFD and searches it for a .gnu_debugaltlink section. If this
! section is found, it examines the section for the name of a file
! containing auxiliary debugging information. It then searches the
! filesystem for this file in a set of standard locations, including
! the directory tree rooted at @var{dir}, and if found returns the
! full filename.
!
! If @var{dir} is NULL, it will search a default path configured into
! libbfd at build time. [FIXME: This feature is not currently
! implemented].
!
! RETURNS
! <<NULL>> on any errors or failure to locate the debug file,
! otherwise a pointer to a heap-allocated string containing the
! filename. The caller is responsible for freeing this string.
! */
!
! char *
! bfd_follow_gnu_debugaltlink (bfd *abfd, const char *dir)
! {
! return find_separate_debug_file (abfd, dir,
! bfd_get_alt_debug_link_info,
! separate_alt_debug_file_exists);
}
/*

87
binutils-2.23.2-ld-texinfo-fixes.patch
View File

@ -1,87 +0,0 @@
*** ../binutils-2.23.2.orig/ld/ld.texinfo 2013-04-25 16:44:07.538768821 +0100
--- ld/ld.texinfo 2013-04-25 16:47:27.040774352 +0100
*************** in the section entitled ``GNU Free Docum
*** 142,153 ****
@ifset ARM
* ARM:: ld and the ARM family
@end ifset
- @ifset HPPA
- * HPPA ELF32:: ld and HPPA 32-bit ELF
- @end ifset
@ifset M68HC11
* M68HC11/68HC12:: ld and the Motorola 68HC11 and 68HC12 families
@end ifset
@ifset M68K
* M68K:: ld and Motorola 68K family
@end ifset
--- 142,153 ----
@ifset ARM
* ARM:: ld and the ARM family
@end ifset
@ifset M68HC11
* M68HC11/68HC12:: ld and the Motorola 68HC11 and 68HC12 families
@end ifset
+ @ifset HPPA
+ * HPPA ELF32:: ld and HPPA 32-bit ELF
+ @end ifset
@ifset M68K
* M68K:: ld and Motorola 68K family
@end ifset
*************** functionality are not listed.
*** 5998,6003 ****
--- 5998,6006 ----
@ifset I960
* i960:: @command{ld} and the Intel 960 family
@end ifset
+ @ifset M68HC11
+ * M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
+ @end ifset
@ifset ARM
* ARM:: @command{ld} and the ARM family
@end ifset
*************** functionality are not listed.
*** 6013,6021 ****
@ifset MSP430
* MSP430:: @command{ld} and MSP430
@end ifset
- @ifset M68HC11
- * M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
- @end ifset
@ifset POWERPC
* PowerPC ELF32:: @command{ld} and PowerPC 32-bit ELF Support
@end ifset
--- 6016,6021 ----
*************** If you have more than one @code{SECT} st
*** 7863,7869 ****
@printindex cp
@tex
! % I think something like @colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
--- 7863,7869 ----
@printindex cp
@tex
! % I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
*************** If you have more than one @code{SECT} st
*** 7874,7880 ****
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
! % Blame: doc@cygnus.com, 28mar91.
@end tex
@bye
--- 7874,7880 ----
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
! % Blame: doc@@cygnus.com, 28mar91.
@end tex
@bye

207
binutils-2.23.2-s390-gas-machinemode.patch
View File

@ -1,207 +0,0 @@
diff -rcp ../binutils-2.23.2.orig/gas/ChangeLog gas/ChangeLog
*** ../binutils-2.23.2.orig/gas/ChangeLog 2013-07-19 12:55:22.375756756 +0100
--- gas/ChangeLog 2013-07-19 13:01:50.274744487 +0100
***************
*** 136,141 ****
--- 136,153 ----
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
+ 2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (set_highgprs_p): New variable.
+ (s390_machinemode): New function.
+ (md_pseudo_table): Add new pseudo command machinemode.
+ (md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
+ specified on command line.
+ (s390_elf_final_processing): Set the highgprs flag in the ELF
+ header depending on set_highgprs_p.
+
+ * doc/c-s390.texi: Document new pseudo machinemode.
+
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
diff -rcp ../binutils-2.23.2.orig/gas/config/tc-s390.c gas/config/tc-s390.c
*** ../binutils-2.23.2.orig/gas/config/tc-s390.c 2013-07-19 12:55:22.390756755 +0100
--- gas/config/tc-s390.c 2013-07-19 13:01:01.537746029 +0100
*************** static int s390_arch_size = 0;
*** 44,49 ****
--- 44,53 ----
static unsigned int current_cpu = S390_OPCODE_MAXCPU - 1;
static unsigned int current_mode_mask = 0;
+ /* Set to TRUE if the highgprs flag in the ELF header needs to be set
+ for the output file. */
+ static bfd_boolean set_highgprs_p = FALSE;
+
/* Whether to use user friendly register names. Default is TRUE. */
#ifndef TARGET_REG_NAMES_P
#define TARGET_REG_NAMES_P TRUE
*************** static void s390_bss (int);
*** 86,91 ****
--- 90,96 ----
static void s390_insn (int);
static void s390_literals (int);
static void s390_machine (int);
+ static void s390_machinemode (int);
const pseudo_typeS md_pseudo_table[] =
{
*************** const pseudo_typeS md_pseudo_table[] =
*** 101,106 ****
--- 106,112 ----
{ "ltorg", s390_literals, 0 },
{ "string", stringer, 8 + 1 },
{ "machine", s390_machine, 0 },
+ { "machinemode", s390_machinemode, 0 },
{ NULL, NULL, 0 }
};
*************** md_parse_option (int c, char *arg)
*** 409,415 ****
current_mode_mask = 1 << S390_OPCODE_ESA;
else if (arg != NULL && strcmp (arg, "zarch") == 0)
! current_mode_mask = 1 << S390_OPCODE_ZARCH;
else if (arg != NULL && strncmp (arg, "arch=", 5) == 0)
{
--- 415,425 ----
current_mode_mask = 1 << S390_OPCODE_ESA;
else if (arg != NULL && strcmp (arg, "zarch") == 0)
! {
! if (s390_arch_size == 32)
! set_highgprs_p = TRUE;
! current_mode_mask = 1 << S390_OPCODE_ZARCH;
! }
else if (arg != NULL && strncmp (arg, "arch=", 5) == 0)
{
*************** s390_machine (int ignore ATTRIBUTE_UNUSE
*** 1863,1868 ****
--- 1873,1955 ----
demand_empty_rest_of_line ();
}
+ /* The .machinemode pseudo op allows to switch to a different
+ architecture mode in the asm listing. The current architecture
+ mode setting can be stored on a stack with .machinemode push and
+ restored with .machinemode pop. */
+
+ static void
+ s390_machinemode (int ignore ATTRIBUTE_UNUSED)
+ {
+ char *mode_string;
+ #define MAX_HISTORY 100
+ static unsigned int *mode_history;
+ static int curr_hist;
+
+ SKIP_WHITESPACE ();
+
+ if (*input_line_pointer == '"')
+ {
+ int len;
+ mode_string = demand_copy_C_string (&len);
+ }
+ else
+ {
+ char c;
+ mode_string = input_line_pointer;
+ c = get_symbol_end ();
+ mode_string = xstrdup (mode_string);
+ *input_line_pointer = c;
+ }
+
+ if (mode_string != NULL)
+ {
+ unsigned int old_mode_mask = current_mode_mask;
+ char *p;
+
+ for (p = mode_string; *p != 0; p++)
+ *p = TOLOWER (*p);
+
+ if (strcmp (mode_string, "push") == 0)
+ {
+ if (mode_history == NULL)
+ mode_history = xmalloc (MAX_HISTORY * sizeof (*mode_history));
+
+ if (curr_hist >= MAX_HISTORY)
+ as_bad (_(".machinemode stack overflow"));
+ else
+ mode_history[curr_hist++] = current_mode_mask;
+ }
+ else if (strcmp (mode_string, "pop") == 0)
+ {
+ if (curr_hist <= 0)
+ as_bad (_(".machinemode stack underflow"));
+ else
+ current_mode_mask = mode_history[--curr_hist];
+ }
+ else
+ {
+ if (strcmp (mode_string, "esa") == 0)
+ current_mode_mask = 1 << S390_OPCODE_ESA;
+ else if (strcmp (mode_string, "zarch") == 0)
+ {
+ if (s390_arch_size == 32)
+ set_highgprs_p = TRUE;
+ current_mode_mask = 1 << S390_OPCODE_ZARCH;
+ }
+ else if (strcmp (mode_string, "zarch_nohighgprs") == 0)
+ current_mode_mask = 1 << S390_OPCODE_ZARCH;
+ else
+ as_bad (_("invalid machine `%s'"), mode_string);
+ }
+
+ if (current_mode_mask != old_mode_mask)
+ s390_setup_opcodes ();
+ }
+
+ demand_empty_rest_of_line ();
+ }
+
char *
md_atof (int type, char *litp, int *sizep)
{
*************** tc_s390_regname_to_dw2regnum (char *regn
*** 2381,2386 ****
void
s390_elf_final_processing (void)
{
! if (s390_arch_size == 32 && (current_mode_mask & (1 << S390_OPCODE_ZARCH)))
elf_elfheader (stdoutput)->e_flags |= EF_S390_HIGH_GPRS;
}
--- 2468,2473 ----
void
s390_elf_final_processing (void)
{
! if (set_highgprs_p)
elf_elfheader (stdoutput)->e_flags |= EF_S390_HIGH_GPRS;
}
diff -rcp ../binutils-2.23.2.orig/gas/doc/c-s390.texi gas/doc/c-s390.texi
*** ../binutils-2.23.2.orig/gas/doc/c-s390.texi 2013-07-19 12:55:21.966756769 +0100
--- gas/doc/c-s390.texi 2013-07-19 12:57:35.845752534 +0100
*************** restored with @code{.machine pop}. Be a
*** 873,878 ****
--- 873,891 ----
to be put into double quotes in case it contains characters not
appropriate for identifiers. So you have to write @code{"z9-109"}
instead of just @code{z9-109}.
+
+ @cindex @code{.machinemode} directive, s390
+ @item .machinemode string
+ This directive allows to change the architecture mode for which code
+ is being generated. @code{string} may be @code{esa}, @code{zarch},
+ @code{zarch_nohighgprs}, @code{push}, or @code{pop}.
+ @code{.machinemode zarch_nohighgprs} can be used to prevent the
+ @code{highgprs} flag from being set in the ELF header of the output
+ file. This is useful in situations where the code is gated with a
+ runtime check which makes sure that the code is only executed on
+ kernels providing the @code{highgprs} feature.
+ @code{.machinemode push} saves the currently selected mode, which may
+ be restored with @code{.machinemode pop}.
@end table
@node s390 Floating Point

309
binutils-2.23.2-s390-zEC12.patch
View File

@ -1,309 +0,0 @@
Index: gas/config/tc-s390.c
===================================================================
--- gas/config/tc-s390.c.orig
+++ gas/config/tc-s390.c
@@ -381,6 +381,8 @@ s390_parse_cpu (char *arg)
return S390_OPCODE_Z10;
else if (strcmp (arg, "z196") == 0)
return S390_OPCODE_Z196;
+ else if (strcmp (arg, "zEC12") == 0)
+ return S390_OPCODE_ZEC12;
else if (strcmp (arg, "all") == 0)
return S390_OPCODE_MAXCPU - 1;
else
Index: gas/doc/as.texinfo
===================================================================
--- gas/doc/as.texinfo.orig
+++ gas/doc/as.texinfo
@@ -1411,7 +1411,8 @@ Select the architecture mode, either the
Architecture (esa) or the z/Architecture mode (zarch).
@item -march=@var{processor}
Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
-@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, or @samp{z10}.
+@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, @samp{z10},
+@samp{z196}, or @samp{zEC12}.
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
Index: gas/doc/c-s390.texi
===================================================================
--- gas/doc/c-s390.texi.orig
+++ gas/doc/c-s390.texi
@@ -17,7 +17,7 @@
The s390 version of @code{@value{AS}} supports two architectures modes
and seven chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
-are g5, g6, z900, z990, z9-109, z9-ec, z10 and z196.
+are g5, g6, z900, z990, z9-109, z9-ec, z10, z196, and zEC12.
@menu
* s390 Options:: Command-line Options.
Index: include/opcode/s390.h
===================================================================
--- include/opcode/s390.h.orig
+++ include/opcode/s390.h
@@ -40,6 +40,7 @@ enum s390_opcode_cpu_val
S390_OPCODE_Z9_EC,
S390_OPCODE_Z10,
S390_OPCODE_Z196,
+ S390_OPCODE_ZEC12,
S390_OPCODE_MAXCPU
};
Index: opcodes/s390-mkopc.c
===================================================================
--- opcodes/s390-mkopc.c.orig
+++ opcodes/s390-mkopc.c
@@ -39,7 +39,8 @@ enum s390_opcode_cpu_val
S390_OPCODE_Z9_109,
S390_OPCODE_Z9_EC,
S390_OPCODE_Z10,
- S390_OPCODE_Z196
+ S390_OPCODE_Z196,
+ S390_OPCODE_ZEC12
};
struct op_struct
@@ -365,6 +366,8 @@ main (void)
min_cpu = S390_OPCODE_Z10;
else if (strcmp (cpu_string, "z196") == 0)
min_cpu = S390_OPCODE_Z196;
+ else if (strcmp (cpu_string, "zEC12") == 0)
+ min_cpu = S390_OPCODE_ZEC12;
else {
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
exit (1);
Index: opcodes/s390-opc.c
===================================================================
--- opcodes/s390-opc.c.orig
+++ opcodes/s390-opc.c
@@ -171,50 +171,64 @@ const struct s390_operand s390_operands[
{ 8, 8, S390_OPERAND_SIGNED },
#define I8_32 48 /* 8 bit signed value starting at 32 */
{ 8, 32, S390_OPERAND_SIGNED },
-#define I16_16 49 /* 16 bit signed value starting at 16 */
+#define I12_12 49 /* 12 bit signed value starting at 12 */
+ { 12, 12, S390_OPERAND_SIGNED },
+#define I16_16 50 /* 16 bit signed value starting at 16 */
{ 16, 16, S390_OPERAND_SIGNED },
-#define I16_32 50 /* 16 bit signed value starting at 32 */
+#define I16_32 51 /* 16 bit signed value starting at 32 */
{ 16, 32, S390_OPERAND_SIGNED },
-#define I32_16 51 /* 32 bit signed value starting at 16 */
+#define I24_24 52 /* 24 bit signed value starting at 24 */
+ { 24, 24, S390_OPERAND_SIGNED },
+#define I32_16 53 /* 32 bit signed value starting at 16 */
{ 32, 16, S390_OPERAND_SIGNED },
/* Unsigned immediate operands. */
-#define U4_8 52 /* 4 bit unsigned value starting at 8 */
+#define U4_8 54 /* 4 bit unsigned value starting at 8 */
{ 4, 8, 0 },
-#define U4_12 53 /* 4 bit unsigned value starting at 12 */
+#define U4_12 55 /* 4 bit unsigned value starting at 12 */
{ 4, 12, 0 },
-#define U4_16 54 /* 4 bit unsigned value starting at 16 */
+#define U4_16 56 /* 4 bit unsigned value starting at 16 */
{ 4, 16, 0 },
-#define U4_20 55 /* 4 bit unsigned value starting at 20 */
+#define U4_20 57 /* 4 bit unsigned value starting at 20 */
{ 4, 20, 0 },
-#define U4_32 56 /* 4 bit unsigned value starting at 32 */
+#define U4_24 58 /* 4 bit unsigned value starting at 24 */
+ { 4, 24, 0 },
+#define U4_28 59 /* 4 bit unsigned value starting at 28 */
+ { 4, 28, 0 },
+#define U4_32 60 /* 4 bit unsigned value starting at 32 */
{ 4, 32, 0 },
-#define U8_8 57 /* 8 bit unsigned value starting at 8 */
+#define U4_36 61 /* 4 bit unsigned value starting at 36 */
+ { 4, 36, 0 },
+#define U8_8 62 /* 8 bit unsigned value starting at 8 */
{ 8, 8, 0 },
-#define U8_16 58 /* 8 bit unsigned value starting at 16 */
+#define U8_16 63 /* 8 bit unsigned value starting at 16 */
{ 8, 16, 0 },
-#define U8_24 59 /* 8 bit unsigned value starting at 24 */
+#define U8_24 64 /* 8 bit unsigned value starting at 24 */
{ 8, 24, 0 },
-#define U8_32 60 /* 8 bit unsigned value starting at 32 */
+#define U8_32 65 /* 8 bit unsigned value starting at 32 */
{ 8, 32, 0 },
-#define U16_16 61 /* 16 bit unsigned value starting at 16 */
+#define U16_16 66 /* 16 bit unsigned value starting at 16 */
{ 16, 16, 0 },
-#define U16_32 62 /* 16 bit unsigned value starting at 32 */
+#define U16_32 67 /* 16 bit unsigned value starting at 32 */
{ 16, 32, 0 },
-#define U32_16 63 /* 32 bit unsigned value starting at 16 */
+#define U32_16 68 /* 32 bit unsigned value starting at 16 */
{ 32, 16, 0 },
/* PC-relative address operands. */
-#define J16_16 64 /* PC relative jump offset at 16 */
+#define J12_12 69 /* PC relative offset at 12 */
+ { 12, 12, S390_OPERAND_PCREL },
+#define J16_16 70 /* PC relative offset at 16 */
{ 16, 16, S390_OPERAND_PCREL },
-#define J32_16 65 /* PC relative long offset at 16 */
+#define J16_32 71 /* PC relative offset at 16 */
+ { 16, 32, S390_OPERAND_PCREL },
+#define J32_16 72 /* PC relative offset at 16 */
{ 32, 16, S390_OPERAND_PCREL },
/* Conditional mask operands. */
-#define M_16OPT 66 /* 4 bit optional mask starting at 16 */
+#define M_16OPT 73 /* 4 bit optional mask starting at 16 */
{ 4, 16, S390_OPERAND_OPTIONAL },
};
@@ -240,13 +254,13 @@ const struct s390_operand s390_operands[
c - control register
d - displacement, 12 bit
f - floating pointer register
- fe - even numbered floating point register operand
+ fe - fpr extended operand, a valid floating pointer register pair
i - signed integer, 4, 8, 16 or 32 bit
l - length, 4 or 8 bit
p - pc relative
r - general purpose register
ro - optional register operand
- re - even numbered register operand
+ re - gpr extended operand, a valid general purpose register pair
u - unsigned integer, 4, 8, 16 or 32 bit
m - mode field, 4 bit
0 - operand skipped.
@@ -267,6 +281,8 @@ const struct s390_operand s390_operands[
The instruction format is: INSTR_SS_LLRDRD / MASK_SS_LLRDRD. */
#define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */
+#define INSTR_IE_UU 4, { U4_24,U4_28,0,0,0,0 } /* e.g. niai */
+#define INSTR_MII_UPI 6, { U4_8,J12_12,I24_24 } /* e.g. bprp */
#define INSTR_RIE_RRP 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxhg */
#define INSTR_RIE_RRPU 6, { R_8,R_12,U4_32,J16_16,0,0 } /* e.g. crj */
#define INSTR_RIE_RRP0 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. crjne */
@@ -368,14 +384,16 @@ const struct s390_operand s390_operands[
#define INSTR_RSE_CCRD 6, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lmh */
#define INSTR_RSE_RURD 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */
#define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
+#define INSTR_RSL_LRDFU 6, { F_32,D_20,L4_8,B_16,U4_36,0 } /* e.g. cdzt */
+#define INSTR_RSL_LRDFEU 6, { FE_32,D_20,L4_8,B_16,U4_36,0 } /* e.g. cxzt */
#define INSTR_RSI_RRP 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */
#define INSTR_RSY_RRRD 6, { R_8,R_12,D20_20,B_16,0,0 } /* e.g. stmy */
#define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
#define INSTR_RSY_RURD 6, { R_8,U4_12,D20_20,B_16,0,0 } /* e.g. icmh */
+#define INSTR_RSY_RURD2 6, { R_8,D20_20,B_16,U4_12,0,0 } /* e.g. loc */
+#define INSTR_RSY_R0RD 6, { R_8,D20_20,B_16,0,0,0 } /* e.g. locgt */
#define INSTR_RSY_AARD 6, { A_8,A_12,D20_20,B_16,0,0 } /* e.g. lamy */
-#define INSTR_RSY_CCRD 6, { C_8,C_12,D20_20,B_16,0,0 } /* e.g. lamy */
-#define INSTR_RSY_RDRM 6, { R_8,D20_20,B_16,U4_12,0,0 } /* e.g. loc */
-#define INSTR_RSY_RDR0 6, { R_8,D20_20,B_16,0,0,0 } /* e.g. loc */
+#define INSTR_RSY_CCRD 6, { C_8,C_12,D20_20,B_16,0,0 } /* e.g. stctg */
#define INSTR_RS_AARD 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */
#define INSTR_RS_CCRD 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */
#define INSTR_RS_R0RD 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */
@@ -407,6 +425,7 @@ const struct s390_operand s390_operands[
#define INSTR_SIY_IRD 6, { D20_20,B_16,I8_8,0,0,0 } /* e.g. asi */
#define INSTR_SIL_RDI 6, { D_20,B_16,I16_32,0,0,0 } /* e.g. chhsi */
#define INSTR_SIL_RDU 6, { D_20,B_16,U16_32,0,0,0 } /* e.g. clfhsi */
+#define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */
#define INSTR_SSE_RDRD 6, { D_20,B_16,D_36,B_32,0,0 } /* e.g. mvsdk */
#define INSTR_SS_L0RDRD 6, { D_20,L8_8,B_16,D_36,B_32,0 } /* e.g. mvc */
#define INSTR_SS_L2RDRD 6, { D_20,B_16,D_36,L8_8,B_32,0 } /* e.g. pka */
@@ -422,6 +441,8 @@ const struct s390_operand s390_operands[
#define INSTR_S_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */
#define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_IE_UU { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_MII_UPI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RIE_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RIE_RRPU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RIE_RRP0 { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
@@ -521,6 +542,8 @@ const struct s390_operand s390_operands[
#define MASK_RSE_CCRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RSL_R0RD { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RSL_LRDFU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSL_LRDFEU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSI_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RS_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RS_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
@@ -532,10 +555,10 @@ const struct s390_operand s390_operands[
#define MASK_RSY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_RERERD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSY_RURD2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSY_R0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RSY_RDRM { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RSY_RDR0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
#define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RXE_FERRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
#define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
@@ -560,6 +583,7 @@ const struct s390_operand s390_operands[
#define MASK_SIY_IRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_SIL_RDI { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_SIL_RDU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_SMI_U0RDP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
#define MASK_SSE_RDRD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_SS_L0RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define MASK_SS_L2RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
Index: opcodes/s390-opc.txt
===================================================================
--- opcodes/s390-opc.txt.orig
+++ opcodes/s390-opc.txt
@@ -1017,14 +1017,14 @@ b9f2 locr RRF_U0RR "load on condition 32
b9f200000000 locr*16 RRF_00RR "load on condition 32 bit" z196 zarch
b9e2 locgr RRF_U0RR "load on condition 64 bit" z196 zarch
b9e200000000 locgr*16 RRF_00RR "load on condition 64 bit" z196 zarch
-eb00000000f2 loc RSY_RDRM "load on condition 32 bit" z196 zarch
-eb00000000f2 loc*12 RSY_RDR0 "load on condition 32 bit" z196 zarch
-eb00000000e2 locg RSY_RDRM "load on condition 64 bit" z196 zarch
-eb00000000e2 locg*12 RSY_RDR0 "load on condition 64 bit" z196 zarch
-eb00000000f3 stoc RSY_RDRM "store on condition 32 bit" z196 zarch
-eb00000000f3 stoc*12 RSY_RDR0 "store on condition 32 bit" z196 zarch
-eb00000000e3 stocg RSY_RDRM "store on condition 64 bit" z196 zarch
-eb00000000e3 stocg*12 RSY_RDR0 "store on condition 64 bit" z196 zarch
+eb00000000f2 loc RSY_RURD2 "load on condition 32 bit" z196 zarch
+eb00000000f2 loc*12 RSY_R0RD "load on condition 32 bit" z196 zarch
+eb00000000e2 locg RSY_RURD2 "load on condition 64 bit" z196 zarch
+eb00000000e2 locg*12 RSY_R0RD "load on condition 64 bit" z196 zarch
+eb00000000f3 stoc RSY_RURD2 "store on condition 32 bit" z196 zarch
+eb00000000f3 stoc*12 RSY_R0RD "store on condition 32 bit" z196 zarch
+eb00000000e3 stocg RSY_RURD2 "store on condition 64 bit" z196 zarch
+eb00000000e3 stocg*12 RSY_R0RD "store on condition 64 bit" z196 zarch
b9f8 ark RRF_R0RR2 "add 3 operands 32 bit" z196 zarch
b9e8 agrk RRF_R0RR2 "add 3 operands 64 bit" z196 zarch
ec00000000d8 ahik RIE_RRI0 "add immediate 3 operands 32 bit" z196 zarch
@@ -1104,3 +1104,26 @@ b3d8 mxtra RRF_FEUFEFE2 "multiply extend
b3d3 sdtra RRF_FUFF2 "subtract long dfp with rounding mode" z196 zarch
b3db sxtra RRF_FEUFEFE2 "subtract extended dfp with rounding mode" z196 zarch
b2b8 srnmb S_RD "set 3 bit bfp rounding mode" z196 zarch
+b2ec etnd RRE_R0 "extract transaction nesting depth" zEC12 zarch
+e30000000025 ntstg RXY_RRRD "nontransactional store" zEC12 zarch
+b2fc tabort S_RD "transaction abort" zEC12 zarch
+e560 tbegin SIL_RDU "transaction begin" zEC12 zarch
+e561 tbeginc SIL_RDU "constrained transaction begin" zEC12 zarch
+b2f8 tend S_00 "transaction end" zEC12 zarch
+c7 bpp SMI_U0RDP "branch prediction preload" zEC12 zarch
+c5 bprp MII_UPI "branch prediction relative preload" zEC12 zarch
+b2fa niai IE_UU "next instruction access intent" zEC12 zarch
+e3000000009f lat RXY_RRRD "load and trap 32 bit" zEC12 zarch
+e30000000085 lgat RXY_RRRD "load and trap 64 bit" zEC12 zarch
+e300000000c8 lfhat RXY_RRRD "load high and trap" zEC12 zarch
+e3000000009d llgfat RXY_RRRD "load logical and trap 32>64" zEC12 zarch
+e3000000009c llgtat RXY_RRRD "load logical thirty one bits and trap 31>64" zEC12 zarch
+eb0000000023 clt RSY_RURD "compare logical and trap 32 bit reg-mem" zEC12 zarch
+eb0000000023 clt$12 RSY_R0RD "compare logical and trap 32 bit reg-mem" zEC12 zarch
+eb000000002b clgt RSY_RURD "compare logical and trap 64 bit reg-mem" zEC12 zarch
+eb000000002b clgt$12 RSY_R0RD "compare logical and trap 64 bit reg-mem" zEC12 zarch
+ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch
+ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
+ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
+ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
+ed00000000a9 czxt RSL_LRDFEU "convert to zoned extended" zEC12 zarch

36
binutils-2.23.2-xtensa.memset.patch
View File

@ -1,36 +0,0 @@
*** ../binutils-2.23.2.orig/bfd/elf32-xtensa.c 2013-08-12 11:34:01.224216581 +0100
--- bfd/elf32-xtensa.c 2013-08-12 11:34:57.932218153 +0100
*************** clear_section_cache (section_cache_t *se
*** 6075,6081 ****
release_internal_relocs (sec_cache->sec, sec_cache->relocs);
if (sec_cache->ptbl)
free (sec_cache->ptbl);
! memset (sec_cache, 0, sizeof (sec_cache));
}
}
--- 6075,6081 ----
release_internal_relocs (sec_cache->sec, sec_cache->relocs);
if (sec_cache->ptbl)
free (sec_cache->ptbl);
! memset (sec_cache, 0, sizeof (* sec_cache));
}
}
*************** section_cache_section (section_cache_t *
*** 6117,6123 ****
/* Fill in the new section cache. */
clear_section_cache (sec_cache);
! memset (sec_cache, 0, sizeof (sec_cache));
sec_cache->sec = sec;
sec_cache->contents = contents;
--- 6117,6123 ----
/* Fill in the new section cache. */
clear_section_cache (sec_cache);
! memset (sec_cache, 0, sizeof (* sec_cache));
sec_cache->sec = sec;
sec_cache->contents = contents;

293
binutils-2.23.51.0.1-gold-keep.patch
View File

@ -1,293 +0,0 @@
diff -rcp ../binutils-2.22.52.0.4.orig/gold/layout.cc gold/layout.cc
*** ../binutils-2.22.52.0.4.orig/gold/layout.cc 2012-08-14 09:38:36.359409453 +0100
--- gold/layout.cc 2012-08-14 09:39:16.393410563 +0100
*************** Layout::get_output_section(const char* n
*** 749,754 ****
--- 749,774 ----
}
}
+ // Returns TRUE iff NAME (an input section from RELOBJ) will
+ // be mapped to an output section that should be KEPT.
+
+ bool
+ Layout::keep_input_section(const Relobj* relobj, const char* name)
+ {
+ if (! this->script_options_->saw_sections_clause())
+ return false;
+
+ Script_sections* ss = this->script_options_->script_sections();
+ const char* file_name = relobj == NULL ? NULL : relobj->name().c_str();
+ Output_section** output_section_slot;
+ Script_sections::Section_type script_section_type;
+ bool keep;
+
+ name = ss->output_section_name(file_name, name, &output_section_slot,
+ &script_section_type, &keep);
+ return name != NULL && keep;
+ }
+
// Pick the output section to use for section NAME, in input file
// RELOBJ, with type TYPE and flags FLAGS. RELOBJ may be NULL for a
// linker created section. IS_INPUT_SECTION is true if we are
*************** Layout::choose_output_section(const Relo
*** 789,796 ****
Output_section** output_section_slot;
Script_sections::Section_type script_section_type;
const char* orig_name = name;
name = ss->output_section_name(file_name, name, &output_section_slot,
! &script_section_type);
if (name == NULL)
{
gold_debug(DEBUG_SCRIPT, _("Unable to create output section '%s' "
--- 809,818 ----
Output_section** output_section_slot;
Script_sections::Section_type script_section_type;
const char* orig_name = name;
+ bool keep;
name = ss->output_section_name(file_name, name, &output_section_slot,
! &script_section_type, &keep);
!
if (name == NULL)
{
gold_debug(DEBUG_SCRIPT, _("Unable to create output section '%s' "
diff -rcp ../binutils-2.22.52.0.4.orig/gold/layout.h gold/layout.h
*** ../binutils-2.22.52.0.4.orig/gold/layout.h 2012-08-14 09:38:52.579409903 +0100
--- gold/layout.h 2012-08-14 09:39:16.403410563 +0100
*************** class Layout
*** 920,925 ****
--- 920,930 ----
section_list() const
{ return this->section_list_; }
+ // Returns TRUE iff NAME (an input section from RELOBJ) will
+ // be mapped to an output section that should be KEPT.
+ bool
+ keep_input_section(const Relobj*, const char*);
+
private:
Layout(const Layout&);
Layout& operator=(const Layout&);
diff -rcp ../binutils-2.22.52.0.4.orig/gold/object.cc gold/object.cc
*** ../binutils-2.22.52.0.4.orig/gold/object.cc 2012-08-14 09:38:43.151409641 +0100
--- gold/object.cc 2012-08-14 09:39:16.412410563 +0100
*************** Sized_relobj_file<size, big_endian>::do_
*** 1437,1442 ****
--- 1437,1443 ----
if (is_gc_pass_one && parameters->options().gc_sections())
{
if (this->is_section_name_included(name)
+ || layout->keep_input_section (this, name)
|| shdr.get_sh_type() == elfcpp::SHT_INIT_ARRAY
|| shdr.get_sh_type() == elfcpp::SHT_FINI_ARRAY)
{
diff -rcp ../binutils-2.22.52.0.4.orig/gold/script-sections.cc gold/script-sections.cc
*** ../binutils-2.22.52.0.4.orig/gold/script-sections.cc 2012-08-14 09:38:49.437409815 +0100
--- gold/script-sections.cc 2012-08-14 09:39:16.413410563 +0100
*************** class Sections_element
*** 582,588 ****
// Output_section_definition.
virtual const char*
output_section_name(const char*, const char*, Output_section***,
! Script_sections::Section_type*)
{ return NULL; }
// Initialize OSP with an output section.
--- 582,588 ----
// Output_section_definition.
virtual const char*
output_section_name(const char*, const char*, Output_section***,
! Script_sections::Section_type*, bool*)
{ return NULL; }
// Initialize OSP with an output section.
*************** class Output_section_element
*** 800,806 ****
// Return whether this element matches FILE_NAME and SECTION_NAME.
// The only real implementation is in Output_section_element_input.
virtual bool
! match_name(const char*, const char*) const
{ return false; }
// Set section addresses. This includes applying assignments if the
--- 800,806 ----
// Return whether this element matches FILE_NAME and SECTION_NAME.
// The only real implementation is in Output_section_element_input.
virtual bool
! match_name(const char*, const char*, bool *) const
{ return false; }
// Set section addresses. This includes applying assignments if the
*************** class Output_section_element_input : pub
*** 1238,1247 ****
*dot_section = this->final_dot_section_;
}
! // See whether we match FILE_NAME and SECTION_NAME as an input
! // section.
bool
! match_name(const char* file_name, const char* section_name) const;
// Set the section address.
void
--- 1238,1247 ----
*dot_section = this->final_dot_section_;
}
! // See whether we match FILE_NAME and SECTION_NAME as an input section.
! // If we do then also indicate whether the section should be KEPT.
bool
! match_name(const char* file_name, const char* section_name, bool* keep) const;
// Set the section address.
void
*************** Output_section_element_input::match_file
*** 1393,1407 ****
return true;
}
! // See whether we match FILE_NAME and SECTION_NAME.
bool
Output_section_element_input::match_name(const char* file_name,
! const char* section_name) const
{
if (!this->match_file_name(file_name))
return false;
// If there are no section name patterns, then we match.
if (this->input_section_patterns_.empty())
return true;
--- 1393,1411 ----
return true;
}
! // See whether we match FILE_NAME and SECTION_NAME. If we do then
! // KEEP indicates whether the section should survive garbage collection.
bool
Output_section_element_input::match_name(const char* file_name,
! const char* section_name,
! bool *keep) const
{
if (!this->match_file_name(file_name))
return false;
+ *keep = this->keep_;
+
// If there are no section name patterns, then we match.
if (this->input_section_patterns_.empty())
return true;
*************** class Output_section_definition : public
*** 1861,1867 ****
// section name.
const char*
output_section_name(const char* file_name, const char* section_name,
! Output_section***, Script_sections::Section_type*);
// Initialize OSP with an output section.
void
--- 1865,1872 ----
// section name.
const char*
output_section_name(const char* file_name, const char* section_name,
! Output_section***, Script_sections::Section_type*,
! bool*);
// Initialize OSP with an output section.
void
*************** Output_section_definition::output_sectio
*** 2146,2159 ****
const char* file_name,
const char* section_name,
Output_section*** slot,
! Script_sections::Section_type* psection_type)
{
// Ask each element whether it matches NAME.
for (Output_section_elements::const_iterator p = this->elements_.begin();
p != this->elements_.end();
++p)
{
! if ((*p)->match_name(file_name, section_name))
{
// We found a match for NAME, which means that it should go
// into this output section.
--- 2151,2165 ----
const char* file_name,
const char* section_name,
Output_section*** slot,
! Script_sections::Section_type* psection_type,
! bool* keep)
{
// Ask each element whether it matches NAME.
for (Output_section_elements::const_iterator p = this->elements_.begin();
p != this->elements_.end();
++p)
{
! if ((*p)->match_name(file_name, section_name, keep))
{
// We found a match for NAME, which means that it should go
// into this output section.
*************** Script_sections::output_section_name(
*** 3365,3371 ****
const char* file_name,
const char* section_name,
Output_section*** output_section_slot,
! Script_sections::Section_type* psection_type)
{
for (Sections_elements::const_iterator p = this->sections_elements_->begin();
p != this->sections_elements_->end();
--- 3371,3378 ----
const char* file_name,
const char* section_name,
Output_section*** output_section_slot,
! Script_sections::Section_type* psection_type,
! bool* keep)
{
for (Sections_elements::const_iterator p = this->sections_elements_->begin();
p != this->sections_elements_->end();
*************** Script_sections::output_section_name(
*** 3373,3379 ****
{
const char* ret = (*p)->output_section_name(file_name, section_name,
output_section_slot,
! psection_type);
if (ret != NULL)
{
--- 3380,3386 ----
{
const char* ret = (*p)->output_section_name(file_name, section_name,
output_section_slot,
! psection_type, keep);
if (ret != NULL)
{
diff -rcp ../binutils-2.22.52.0.4.orig/gold/script-sections.h gold/script-sections.h
*** ../binutils-2.22.52.0.4.orig/gold/script-sections.h 2012-08-14 09:38:41.679409601 +0100
--- gold/script-sections.h 2012-08-14 09:39:16.421410563 +0100
*************** class Script_sections
*** 163,172 ****
// PSCRIPT_SECTION_TYPE points to a location for returning the section
// type specified in script. This can be SCRIPT_SECTION_TYPE_NONE if
// no type is specified.
const char*
output_section_name(const char* file_name, const char* section_name,
Output_section*** output_section_slot,
! Section_type* pscript_section_type);
// Place a marker for an orphan output section into the SECTIONS
// clause.
--- 163,174 ----
// PSCRIPT_SECTION_TYPE points to a location for returning the section
// type specified in script. This can be SCRIPT_SECTION_TYPE_NONE if
// no type is specified.
+ // *KEEP indicates whether the section should survive garbage collection.
const char*
output_section_name(const char* file_name, const char* section_name,
Output_section*** output_section_slot,
! Section_type* pscript_section_type,
! bool* keep);
// Place a marker for an orphan output section into the SECTIONS
// clause.

22
binutils-2.23.51.0.1-readelf-flush-stdout.patch
View File

@ -1,22 +0,0 @@
*** ../orig.binutils-2.23.51.0.1/binutils/elfcomm.c 2013-09-09 13:01:22.010343521 +0100
--- binutils/elfcomm.c 2013-09-09 13:01:59.389344557 +0100
*************** error (const char *message, ...)
*** 36,41 ****
--- 36,42 ----
{
va_list args;
+ fflush (stdout);
va_start (args, message);
fprintf (stderr, _("%s: Error: "), program_name);
vfprintf (stderr, message, args);
*************** warn (const char *message, ...)
*** 47,52 ****
--- 48,54 ----
{
va_list args;
+ fflush (stdout);
va_start (args, message);
fprintf (stderr, _("%s: Warning: "), program_name);
vfprintf (stderr, message, args);

208
binutils-2.23.51.0.3-arm-ldralt.patch
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@ -1,208 +0,0 @@
diff -rcp ../binutils-2.23.51.0.3.orig/gas/ChangeLog ./gas/ChangeLog
*** ../binutils-2.23.51.0.3.orig/gas/ChangeLog 2012-10-23 10:15:13.038870720 +0100
--- ./gas/ChangeLog 2012-10-23 10:17:56.688907041 +0100
***************
*** 1,3 ****
--- 1,8 ----
+ 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c: Changed ldra and strl-form mnemonics
+ to lda and stl-form for armv8.
+
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
diff -rcp ../binutils-2.23.51.0.3.orig/gas/config/tc-arm.c ./gas/config/tc-arm.c
*** ../binutils-2.23.51.0.3.orig/gas/config/tc-arm.c 2012-10-23 10:15:13.379871049 +0100
--- ./gas/config/tc-arm.c 2012-10-23 10:16:50.892897421 +0100
*************** do_strexd (void)
*** 8738,8744 ****
/* ARM V8 STRL. */
static void
! do_strlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
--- 8738,8744 ----
/* ARM V8 STRL. */
static void
! do_stlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
*************** do_strlex (void)
*** 8747,8753 ****
}
static void
! do_t_strlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
--- 8747,8753 ----
}
static void
! do_t_stlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
*************** static const struct asm_opcode insns[] =
*** 18476,18500 ****
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
! TCE("ldraex", 1900e9f, e8d00fef, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldraexd", 1b00e9f, e8d000ff, 3, (RRnpc, oRRnpc, RRnpcb),
ldrexd, t_ldrexd),
! TCE("ldraexb", 1d00e9f, e8d00fcf, 2, (RRnpc,RRnpcb), rd_rn, rd_rn),
! TCE("ldraexh", 1f00e9f, e8d00fdf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("strlex", 1800e90, e8c00fe0, 3, (RRnpc, RRnpc, RRnpcb),
! strlex, t_strlex),
! TCE("strlexd", 1a00e90, e8c000f0, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb),
strexd, t_strexd),
! TCE("strlexb", 1c00e90, e8c00fc0, 3, (RRnpc, RRnpc, RRnpcb),
! strlex, t_strlex),
! TCE("strlexh", 1e00e90, e8c00fd0, 3, (RRnpc, RRnpc, RRnpcb),
! strlex, t_strlex),
! TCE("ldra", 1900c9f, e8d00faf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldrab", 1d00c9f, e8d00f8f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldrah", 1f00c9f, e8d00f9f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("strl", 180fc90, e8c00faf, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
! TCE("strlb", 1c0fc90, e8c00f8f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
! TCE("strlh", 1e0fc90, e8c00f9f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
/* ARMv8 T32 only. */
#undef ARM_VARIANT
--- 18476,18500 ----
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
! TCE("ldaex", 1900e9f, e8d00fef, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldaexd", 1b00e9f, e8d000ff, 3, (RRnpc, oRRnpc, RRnpcb),
ldrexd, t_ldrexd),
! TCE("ldaexb", 1d00e9f, e8d00fcf, 2, (RRnpc,RRnpcb), rd_rn, rd_rn),
! TCE("ldaexh", 1f00e9f, e8d00fdf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("stlex", 1800e90, e8c00fe0, 3, (RRnpc, RRnpc, RRnpcb),
! stlex, t_stlex),
! TCE("stlexd", 1a00e90, e8c000f0, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb),
strexd, t_strexd),
! TCE("stlexb", 1c00e90, e8c00fc0, 3, (RRnpc, RRnpc, RRnpcb),
! stlex, t_stlex),
! TCE("stlexh", 1e00e90, e8c00fd0, 3, (RRnpc, RRnpc, RRnpcb),
! stlex, t_stlex),
! TCE("lda", 1900c9f, e8d00faf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldab", 1d00c9f, e8d00f8f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("ldah", 1f00c9f, e8d00f9f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
! TCE("stl", 180fc90, e8c00faf, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
! TCE("stlb", 1c0fc90, e8c00f8f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
! TCE("stlh", 1e0fc90, e8c00f9f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
/* ARMv8 T32 only. */
#undef ARM_VARIANT
diff -rcp ../binutils-2.23.51.0.3.orig/opcodes/arm-dis.c ./opcodes/arm-dis.c
*** ../binutils-2.23.51.0.3.orig/opcodes/arm-dis.c 2012-10-23 10:15:16.976873621 +0100
--- ./opcodes/arm-dis.c 2012-10-23 10:16:34.204894516 +0100
*************** static const struct opcode32 arm_opcodes
*** 889,908 ****
/* V8 instructions. */
{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
{ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
! {ARM_EXT_V8, 0x01800e90, 0x0ff00ff0, "strlex%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01900e9f, 0x0ff00fff, "ldraex%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01a00e90, 0x0ff00ff0, "strlexd%c\t%12-15r, %0-3r, %0-3T, [%16-19R]"},
! {ARM_EXT_V8, 0x01b00e9f, 0x0ff00fff, "ldraexd%c\t%12-15r, %12-15T, [%16-19R]"},
! {ARM_EXT_V8, 0x01c00e90, 0x0ff00ff0, "strlexb%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01d00e9f, 0x0ff00fff, "ldraexb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01e00e90, 0x0ff00ff0, "strlexh%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01f00e9f, 0x0ff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x0180fc90, 0x0ff0fff0, "strl%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01900c9f, 0x0ff00fff, "ldra%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01c0fc90, 0x0ff0fff0, "strlb%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01d00c9f, 0x0ff00fff, "ldrab%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01e0fc90, 0x0ff0fff0, "strlh%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01f00c9f, 0x0ff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
/* Virtualization Extension instructions. */
{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
--- 889,908 ----
/* V8 instructions. */
{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
{ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
! {ARM_EXT_V8, 0x01800e90, 0x0ff00ff0, "stlex%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01900e9f, 0x0ff00fff, "ldaex%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01a00e90, 0x0ff00ff0, "stlexd%c\t%12-15r, %0-3r, %0-3T, [%16-19R]"},
! {ARM_EXT_V8, 0x01b00e9f, 0x0ff00fff, "ldaexd%c\t%12-15r, %12-15T, [%16-19R]"},
! {ARM_EXT_V8, 0x01c00e90, 0x0ff00ff0, "stlexb%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01d00e9f, 0x0ff00fff, "ldaexb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01e00e90, 0x0ff00ff0, "stlexh%c\t%12-15r, %0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01f00e9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x0180fc90, 0x0ff0fff0, "stl%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01900c9f, 0x0ff00fff, "lda%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01c0fc90, 0x0ff0fff0, "stlb%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01d00c9f, 0x0ff00fff, "ldab%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"},
! {ARM_EXT_V8, 0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
/* Virtualization Extension instructions. */
{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
*************** static const struct opcode32 thumb32_opc
*** 1475,1494 ****
/* V8 instructions. */
{ARM_EXT_V8, 0xf3af8005, 0xffffffff, "sevl%c.w"},
{ARM_EXT_V8, 0xf78f8000, 0xfffffffc, "dcps%0-1d"},
! {ARM_EXT_V8, 0xe8c00f8f, 0xfff00fff, "strlb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00f9f, 0xfff00fff, "strlh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00faf, 0xfff00fff, "strl%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fc0, 0xfff00ff0, "strlexb%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fd0, 0xfff00ff0, "strlexh%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fe0, 0xfff00ff0, "strlex%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c000f0, 0xfff000f0, "strlexd%c\t%0-3r, %12-15r, %8-11r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00f8f, 0xfff00fff, "ldrab%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00f9f, 0xfff00fff, "ldrah%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00faf, 0xfff00fff, "ldra%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fcf, 0xfff00fff, "ldraexb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fdf, 0xfff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fef, 0xfff00fff, "ldraex%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d000ff, 0xfff000ff, "ldraexd%c\t%12-15r, %8-11r, [%16-19R]"},
/* V7 instructions. */
{ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli%c\t%a"},
--- 1475,1494 ----
/* V8 instructions. */
{ARM_EXT_V8, 0xf3af8005, 0xffffffff, "sevl%c.w"},
{ARM_EXT_V8, 0xf78f8000, 0xfffffffc, "dcps%0-1d"},
! {ARM_EXT_V8, 0xe8c00f8f, 0xfff00fff, "stlb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00f9f, 0xfff00fff, "stlh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00faf, 0xfff00fff, "stl%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fc0, 0xfff00ff0, "stlexb%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fd0, 0xfff00ff0, "stlexh%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c00fe0, 0xfff00ff0, "stlex%c\t%0-3r, %12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8c000f0, 0xfff000f0, "stlexd%c\t%0-3r, %12-15r, %8-11r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00f8f, 0xfff00fff, "ldab%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00f9f, 0xfff00fff, "ldah%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00faf, 0xfff00fff, "lda%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fcf, 0xfff00fff, "ldaexb%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fdf, 0xfff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d00fef, 0xfff00fff, "ldaex%c\t%12-15r, [%16-19R]"},
! {ARM_EXT_V8, 0xe8d000ff, 0xfff000ff, "ldaexd%c\t%12-15r, %8-11r, [%16-19R]"},
/* V7 instructions. */
{ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli%c\t%a"},
diff -rcp ../binutils-2.23.51.0.3.orig/opcodes/ChangeLog ./opcodes/ChangeLog
*** ../binutils-2.23.51.0.3.orig/opcodes/ChangeLog 2012-10-23 10:15:17.783874153 +0100
--- ./opcodes/ChangeLog 2012-10-23 10:18:43.593915807 +0100
***************
*** 1,3 ****
--- 1,8 ----
+ 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * arm-dis.c: Changed ldra and strl-form mnemonics
+ to lda and stl-form.
+
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from

25
binutils-2.23.52.0.1-64-bit-thin-archives.patch
View File

@ -1,25 +0,0 @@
*** ../binutils-2.23.52.0.1.orig/bfd/archive64.c 2013-03-01 17:20:39.873535502 +0000
--- bfd/archive64.c 2013-03-01 17:22:30.410538566 +0000
*************** bfd_elf64_archive_write_armap (bfd *arch
*** 210,218 ****
if (bfd_bwrite (buf, 8, arch) != 8)
return FALSE;
}
/* Add size of this archive entry */
! archive_member_file_ptr += (arelt_size (current)
! + sizeof (struct ar_hdr));
/* remember about the even alignment */
archive_member_file_ptr += archive_member_file_ptr % 2;
}
--- 210,220 ----
if (bfd_bwrite (buf, 8, arch) != 8)
return FALSE;
}
+
/* Add size of this archive entry */
! archive_member_file_ptr += sizeof (struct ar_hdr);
! if (! bfd_is_thin_archive (arch))
! archive_member_file_ptr += arelt_size (current);
/* remember about the even alignment */
archive_member_file_ptr += archive_member_file_ptr % 2;
}

368
binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch
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@ -1,368 +0,0 @@
diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi gas/doc/c-arm.texi
*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi 2013-03-04 08:25:32.039931945 +0000
--- gas/doc/c-arm.texi 2013-03-04 08:27:37.462927978 +0000
*************** ARM and THUMB instructions had their own
*** 390,418 ****
@code{unified} syntax, which can be selected via the @code{.syntax}
directive, and has the following main features:
! @table @bullet
! @item
Immediate operands do not require a @code{#} prefix.
! @item
The @code{IT} instruction may appear, and if it does it is validated
against subsequent conditional affixes. In ARM mode it does not
generate machine code, in THUMB mode it does.
! @item
For ARM instructions the conditional affixes always appear at the end
of the instruction. For THUMB instructions conditional affixes can be
used, but only inside the scope of an @code{IT} instruction.
! @item
All of the instructions new to the V6T2 architecture (and later) are
available. (Only a few such instructions can be written in the
@code{divided} syntax).
! @item
The @code{.N} and @code{.W} suffixes are recognized and honored.
! @item
All instructions set the flags if and only if they have an @code{s}
affix.
@end table
--- 390,418 ----
@code{unified} syntax, which can be selected via the @code{.syntax}
directive, and has the following main features:
! @table @code
! @item 1
Immediate operands do not require a @code{#} prefix.
! @item 2
The @code{IT} instruction may appear, and if it does it is validated
against subsequent conditional affixes. In ARM mode it does not
generate machine code, in THUMB mode it does.
! @item 3
For ARM instructions the conditional affixes always appear at the end
of the instruction. For THUMB instructions conditional affixes can be
used, but only inside the scope of an @code{IT} instruction.
! @item 4
All of the instructions new to the V6T2 architecture (and later) are
available. (Only a few such instructions can be written in the
@code{divided} syntax).
! @item 5
The @code{.N} and @code{.W} suffixes are recognized and honored.
! @item 6
All instructions set the flags if and only if they have an @code{s}
affix.
@end table
*************** Either @samp{#} or @samp{$} can be used
*** 451,478 ****
@cindex register names, ARM
*TODO* Explain about ARM register naming, and the predefined names.
- @node ARM-Neon-Alignment
- @subsection NEON Alignment Specifiers
-
- @cindex alignment for NEON instructions
- Some NEON load/store instructions allow an optional address
- alignment qualifier.
- The ARM documentation specifies that this is indicated by
- @samp{@@ @var{align}}. However GAS already interprets
- the @samp{@@} character as a "line comment" start,
- so @samp{: @var{align}} is used instead. For example:
-
- @smallexample
- vld1.8 @{q0@}, [r0, :128]
- @end smallexample
-
- @node ARM Floating Point
- @section Floating Point
-
- @cindex floating point, ARM (@sc{ieee})
- @cindex ARM floating point (@sc{ieee})
- The ARM family uses @sc{ieee} floating-point numbers.
-
@node ARM-Relocations
@subsection ARM relocation generation
--- 451,456 ----
*************** respectively. For example to load the 3
*** 519,524 ****
--- 497,524 ----
MOVT r0, #:upper16:foo
@end smallexample
+ @node ARM-Neon-Alignment
+ @subsection NEON Alignment Specifiers
+
+ @cindex alignment for NEON instructions
+ Some NEON load/store instructions allow an optional address
+ alignment qualifier.
+ The ARM documentation specifies that this is indicated by
+ @samp{@@ @var{align}}. However GAS already interprets
+ the @samp{@@} character as a "line comment" start,
+ so @samp{: @var{align}} is used instead. For example:
+
+ @smallexample
+ vld1.8 @{q0@}, [r0, :128]
+ @end smallexample
+
+ @node ARM Floating Point
+ @section Floating Point
+
+ @cindex floating point, ARM (@sc{ieee})
+ @cindex ARM floating point (@sc{ieee})
+ The ARM family uses @sc{ieee} floating-point numbers.
+
@node ARM Directives
@section ARM Machine Directives
*** ../binutils-2.23.2.orig/gas/doc/c-arc.texi 2013-04-24 11:06:46.573176853 +0100
--- gas/doc/c-arc.texi 2013-04-24 11:13:18.257187711 +0100
*************** The extension instructions are not macro
*** 220,226 ****
encodings for use of these instructions according to the specification
by the user. The parameters are:
! @table @bullet
@item @var{name}
Name of the extension instruction
--- 220,226 ----
encodings for use of these instructions according to the specification
by the user. The parameters are:
! @table @code
@item @var{name}
Name of the extension instruction
*** ../binutils-2.23.2.orig/gas/doc/c-cr16.texi 2013-04-24 11:06:46.576176853 +0100
--- gas/doc/c-cr16.texi 2013-04-24 11:14:25.456189574 +0100
*************** Operand expression type qualifier is an
*** 44,69 ****
CR16 target operand qualifiers and its size (in bits):
@table @samp
! @item Immediate Operand
! - s ---- 4 bits
! @item
! - m ---- 16 bits, for movb and movw instructions.
! @item
! - m ---- 20 bits, movd instructions.
! @item
! - l ---- 32 bits
!
! @item Absolute Operand
! - s ---- Illegal specifier for this operand.
! @item
! - m ---- 20 bits, movd instructions.
!
! @item Displacement Operand
! - s ---- 8 bits
! @item
! - m ---- 16 bits
! @item
! - l ---- 24 bits
@end table
For example:
--- 44,76 ----
CR16 target operand qualifiers and its size (in bits):
@table @samp
! @item Immediate Operand: s
! 4 bits.
!
! @item Immediate Operand: m
! 16 bits, for movb and movw instructions.
!
! @item Immediate Operand: m
! 20 bits, movd instructions.
!
! @item Immediate Operand: l
! 32 bits.
!
! @item Absolute Operand: s
! Illegal specifier for this operand.
!
! @item Absolute Operand: m
! 20 bits, movd instructions.
!
! @item Displacement Operand: s
! 8 bits.
!
! @item Displacement Operand: m
! 16 bits.
!
! @item Displacement Operand: l
! 24 bits.
!
@end table
For example:
*** ../binutils-2.23.2.orig/gas/doc/c-tic54x.texi 2013-04-24 11:06:46.571176853 +0100
--- gas/doc/c-tic54x.texi 2013-04-24 11:15:13.653190910 +0100
*************** In this example, x is replaced with SYM2
*** 109,115 ****
is replaced with x. At this point, x has already been encountered
and the substitution stops.
! @smallexample @code
.asg "x",SYM1
.asg "SYM1",SYM2
.asg "SYM2",x
--- 109,115 ----
is replaced with x. At this point, x has already been encountered
and the substitution stops.
! @smallexample
.asg "x",SYM1
.asg "SYM1",SYM2
.asg "SYM2",x
*************** Substitution may be forced in situations
*** 126,132 ****
ambiguous by placing colons on either side of the subsym. The following
code:
! @smallexample @code
.eval "10",x
LAB:X: add #x, a
@end smallexample
--- 126,132 ----
ambiguous by placing colons on either side of the subsym. The following
code:
! @smallexample
.eval "10",x
LAB:X: add #x, a
@end smallexample
*************** The @code{LDX} pseudo-op is provided for
*** 309,315 ****
of a label or address. For example, if an address @code{_label} resides
in extended program memory, the value of @code{_label} may be loaded as
follows:
! @smallexample @code
ldx #_label,16,a ; loads extended bits of _label
or #_label,a ; loads lower 16 bits of _label
bacc a ; full address is in accumulator A
--- 309,315 ----
of a label or address. For example, if an address @code{_label} resides
in extended program memory, the value of @code{_label} may be loaded as
follows:
! @smallexample
ldx #_label,16,a ; loads extended bits of _label
or #_label,a ; loads lower 16 bits of _label
bacc a ; full address is in accumulator A
diff -cp ../binutils-2.23.2.orig/gas/doc/c-mips.texi gas/doc/c-mips.texi
*** ../binutils-2.23.2.orig/gas/doc/c-mips.texi 2013-04-25 16:43:35.115767923 +0100
--- gas/doc/c-mips.texi 2013-04-26 08:07:10.338304064 +0100
*************** the @samp{mad} and @samp{madu} instructi
*** 234,240 ****
instructions around accesses to the @samp{HI} and @samp{LO} registers.
@samp{-no-m4650} turns off this option.
! @itemx -m3900
@itemx -no-m3900
@itemx -m4100
@itemx -no-m4100
--- 234,240 ----
instructions around accesses to the @samp{HI} and @samp{LO} registers.
@samp{-no-m4650} turns off this option.
! @item -m3900
@itemx -no-m3900
@itemx -m4100
@itemx -no-m4100
diff -cp ../binutils-2.23.2.orig/gas/doc/c-score.texi gas/doc/c-score.texi
*** ../binutils-2.23.2.orig/gas/doc/c-score.texi 2013-04-25 16:43:35.043767921 +0100
--- gas/doc/c-score.texi 2013-04-26 08:07:37.975304830 +0100
*************** implicitly with the @code{gp} register.
*** 37,43 ****
@item -EB
Assemble code for a big-endian cpu
! @itemx -EL
Assemble code for a little-endian cpu
@item -FIXDD
--- 37,43 ----
@item -EB
Assemble code for a big-endian cpu
! @item -EL
Assemble code for a little-endian cpu
@item -FIXDD
*************** Assemble code for no warning message for
*** 49,61 ****
@item -SCORE5
Assemble code for target is SCORE5
! @itemx -SCORE5U
Assemble code for target is SCORE5U
! @itemx -SCORE7
Assemble code for target is SCORE7, this is default setting
! @itemx -SCORE3
Assemble code for target is SCORE3
@item -march=score7
--- 49,61 ----
@item -SCORE5
Assemble code for target is SCORE5
! @item -SCORE5U
Assemble code for target is SCORE5U
! @item -SCORE7
Assemble code for target is SCORE7, this is default setting
! @item -SCORE3
Assemble code for target is SCORE3
@item -march=score7
diff -cp ../binutils-2.23.2.orig/gas/doc/c-tic54x.texi gas/doc/c-tic54x.texi
*** ../binutils-2.23.2.orig/gas/doc/c-tic54x.texi 2013-04-25 16:43:35.042767921 +0100
--- gas/doc/c-tic54x.texi 2013-04-26 08:08:02.418305508 +0100
*************** LAB:X: add #x, a
*** 133,139 ****
When assembled becomes:
! @smallexample @code
LAB10 add #10, a
@end smallexample
--- 133,139 ----
When assembled becomes:
! @smallexample
LAB10 add #10, a
@end smallexample
*************** Assign @var{name} the string @var{string
*** 345,351 ****
performed on @var{string} before assignment.
@cindex @code{eval} directive, TIC54X
! @itemx .eval @var{string}, @var{name}
Evaluate the contents of string @var{string} and assign the result as a
string to the subsym @var{name}. String replacement is performed on
@var{string} before assignment.
--- 345,351 ----
performed on @var{string} before assignment.
@cindex @code{eval} directive, TIC54X
! @item .eval @var{string}, @var{name}
Evaluate the contents of string @var{string} and assign the result as a
string to the subsym @var{name}. String replacement is performed on
@var{string} before assignment.

48
binutils-2.23.52.0.1-check-regular-ifunc-refs.patch
View File

@ -1,48 +0,0 @@
*** ../binutils-2.23.52.0.1.orig/bfd/elf-ifunc.c 2013-04-17 15:53:49.662586029 +0100
--- bfd/elf-ifunc.c 2013-04-17 15:55:55.269589511 +0100
*************** _bfd_elf_allocate_ifunc_dyn_relocs (stru
*** 187,209 ****
htab = elf_hash_table (info);
/* Support garbage collection against STT_GNU_IFUNC symbols. */
if (h->plt.refcount <= 0 && h->got.refcount <= 0)
{
- /* When building shared library, we need to handle the case
- where it is marked with regular reference, but not non-GOT
- reference. It may happen if we didn't see STT_GNU_IFUNC
- symbol at the time when checking relocations. */
- if (info->shared
- && !h->non_got_ref
- && h->ref_regular)
- for (p = *head; p != NULL; p = p->next)
- if (p->count)
- {
- h->non_got_ref = 1;
- goto keep;
- }
-
h->got = htab->init_got_offset;
h->plt = htab->init_plt_offset;
*head = NULL;
--- 187,206 ----
htab = elf_hash_table (info);
+ /* When building a shared library, we need to handle the case where it is
+ marked with a regular reference, but not a non-GOT reference since the
+ non-GOT reference bit may not be set here. */
+ if (info->shared && !h->non_got_ref && h->ref_regular)
+ for (p = *head; p != NULL; p = p->next)
+ if (p->count)
+ {
+ h->non_got_ref = 1;
+ goto keep;
+ }
+
/* Support garbage collection against STT_GNU_IFUNC symbols. */
if (h->plt.refcount <= 0 && h->got.refcount <= 0)
{
h->got = htab->init_got_offset;
h->plt = htab->init_plt_offset;
*head = NULL;

38
binutils-2.23.52.0.1-revert-pr15149.patch
View File

@ -1,38 +0,0 @@
*** ../binutils-2.23.52.0.1.orig/bfd/elflink.c 2013-03-08 12:02:14.544141961 +0000
--- bfd/elflink.c 2013-03-08 12:03:40.952144356 +0000
*************** error_free_dyn:
*** 4080,4087 ****
FALSE, FALSE, FALSE);
if (h != NULL
! && (h->root.type == bfd_link_hash_undefined
! || h->root.type == bfd_link_hash_undefweak)
&& h->root.u.undef.abfd)
undef_bfd = h->root.u.undef.abfd;
}
--- 4080,4086 ----
FALSE, FALSE, FALSE);
if (h != NULL
! && h->root.type == bfd_link_hash_undefined
&& h->root.u.undef.abfd)
undef_bfd = h->root.u.undef.abfd;
}
*************** error_free_dyn:
*** 4201,4208 ****
FALSE, FALSE, FALSE);
if (h != NULL
! && (h->root.type == bfd_link_hash_undefined
! || h->root.type == bfd_link_hash_undefweak)
&& h->root.u.undef.abfd)
undef_bfd = h->root.u.undef.abfd;
}
--- 4200,4206 ----
FALSE, FALSE, FALSE);
if (h != NULL
! && h->root.type == bfd_link_hash_undefined
&& h->root.u.undef.abfd)
undef_bfd = h->root.u.undef.abfd;
}

121
binutils-rh805974.patch
View File

@ -1,121 +0,0 @@
From binutils-return-76960-listarch-binutils=sources dot redhat dot com at sourceware dot org Mon Sep 03 12:05:02 2012
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From: "Andreas Krebbel" <andreas at de dot ibm dot com>
Date: Mon, 3 Sep 2012 14:04:39 +0200
To: binutils at sourceware dot org
Subject: [Committed] S/390: Handle PLTOFF for IFUNC symbols correctly
Message-ID: <20120903120439.GA10593@bart>
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Hi,
the s390 IFUNC support so far didn't deal correctly with PLTOFF
relocs. Fixed with the attached patch.
Committed.
Bye,
-Andreas-
2012-09-03 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf32-s390.c (elf_s390_relocate_section): Handle PLTOFF for
local and global ifunc symbols.
* elf64-s390.c (elf_s390_relocate_section): Likewise.
---
bfd/elf32-s390.c | 8 ++++++--
bfd/elf64-s390.c | 11 ++++++++---
2 files changed, 14 insertions(+), 5 deletions(-)
Index: binutils/bfd/elf32-s390.c
===================================================================
--- binutils.orig/bfd/elf32-s390.c
+++ binutils/bfd/elf32-s390.c
@@ -2349,6 +2349,10 @@ elf_s390_relocate_section (bfd *output_b
switch (r_type)
{
+ case R_390_PLTOFF16:
+ case R_390_PLTOFF32:
+ relocation -= htab->elf.sgot->output_section->vma;
+ break;
case R_390_GOTPLT12:
case R_390_GOTPLT16:
case R_390_GOTPLT20:
@@ -2625,9 +2629,9 @@ elf_s390_relocate_section (bfd *output_b
/* For local symbols or if we didn't make a PLT entry for
this symbol resolve the symbol directly. */
- if ( h == NULL
+ if (h == NULL
|| h->plt.offset == (bfd_vma) -1
- || htab->elf.splt == NULL)
+ || (htab->elf.splt == NULL && !s390_is_ifunc_symbol_p (h)))
{
relocation -= htab->elf.sgot->output_section->vma;
break;
Index: binutils/bfd/elf64-s390.c
===================================================================
--- binutils.orig/bfd/elf64-s390.c
+++ binutils/bfd/elf64-s390.c
@@ -2306,6 +2306,11 @@ elf_s390_relocate_section (bfd *output_b
switch (r_type)
{
+ case R_390_PLTOFF16:
+ case R_390_PLTOFF32:
+ case R_390_PLTOFF64:
+ relocation -= htab->elf.sgot->output_section->vma;
+ break;
case R_390_GOTPLT12:
case R_390_GOTPLT16:
case R_390_GOTPLT20:
@@ -2561,7 +2566,7 @@ elf_s390_relocate_section (bfd *output_b
break;
if (h->plt.offset == (bfd_vma) -1
- || (htab->elf.splt == NULL && htab->elf.iplt == NULL))
+ || (htab->elf.splt == NULL && !s390_is_ifunc_symbol_p (h)))
{
/* We didn't make a PLT entry for this symbol. This
happens when statically linking PIC code, or when
@@ -2587,9 +2592,9 @@ elf_s390_relocate_section (bfd *output_b
/* For local symbols or if we didn't make a PLT entry for
this symbol resolve the symbol directly. */
- if ( h == NULL
+ if (h == NULL
|| h->plt.offset == (bfd_vma) -1
- || htab->elf.splt == NULL)
+ || (htab->elf.splt == NULL && !s390_is_ifunc_symbol_p (h)))
{
relocation -= htab->elf.sgot->output_section->vma;
break;