atlas.spec: pass RPM_LD_FLAGS to linker

resolves: 1547515

.gitignore

@@ -9,3 +9,4 @@ K7323DNow.tgz
 /ARMv732NEON.tar.bz2
 /lapack-3.5.0.tgz
 /atlas3.10.2.tar.bz2
+/POWER864LEVSXp4.tar.bz2

atlas-new_archdef_for_ppc64le.patch

@@ -0,0 +1,32 @@
+Subject: atlas new archdef for ppc64le
+From: Michel Normand <normand@linux.vnet.ibm.com>
+Date: Sun, 13 Jun 2014 18:02:47 +0200
+
+Need to define different archdef names
+for ppc64 (that is Big Endian) and ppc64le (that is Little Endian).
+This is already done upstream in atlas 3.11.30 with issue
+https://sourceforge.net/p/math-atlas/patches/66/
+
+Required at least as long as I need the bypass of
+atlas.3.10.2-ppc64le_do_not_use_files_with_lvx.patch
+
+Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com>
+---
+ CONFIG/src/SpewMakeInc.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+Index: ATLAS/CONFIG/src/SpewMakeInc.c
+===================================================================
+--- ATLAS.orig/CONFIG/src/SpewMakeInc.c
++++ ATLAS/CONFIG/src/SpewMakeInc.c
+@@ -542,6 +542,10 @@ int main(int nargs, char **args)
+    fprintf(fpout, "#  -------------------------------------------------\n");
+    fprintf(fpout, "   ARCH = %s", machnam[mach]);
+    fprintf(fpout, "%d", ptrbits);
++   /* for ppc64le archi add 'LE' characters */
++   #if defined(__powerpc64__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
++      fprintf(fpout, "%s", "LE");
++   #endif
+    if (ISAX)
+       fprintf(fpout, "%s", ISAXNAM[ISAX]);
+    if (!USEIEEE)

atlas-shared_libraries.patch

@@ -20,12 +20,12 @@ index ab1eb9963d36678972a0a410905169aaa563dc64..27c6e316b442e09b0f46afac7940aaa1
  DYNlibs = liblapack.so libf77blas.so libcblas.so libatlas.so 
  PTDYNlibs = liblapack.so libptf77blas.so libptcblas.so libatlas.so 
  CDYNlibs = liblapack.so libcblas.so libatlas.so 
-@@ -116,9 +118,12 @@ LDTRY:
+@@ -116,9 +116,12 @@ LDTRY:
             -rpath-link $(LIBINSTdir)  \
             --whole-archive $(libas) --no-whole-archive $(LIBS)
  GCCTRY:
 -	$(GOODGCC) -shared -o $(outso)  \
--           -Wl,"rpath-link $(LIBINSTdir)" \
+-           -Wl,"-rpath-link $(LIBINSTdir)" \
 +	$(GOODGCC) -shared -o $(outso).$(so_ver)  \
 +           \
 +           -Wl,-soname,"$(outso).$(so_ver_major)" \

atlas.3.10.2-add_power8_cpu.patch

@@ -0,0 +1,131 @@
+From: Michel Normand <normand@linux.vnet.ibm.com>
+Subject: atlas.3.10.2 add power8 cpu
+Date: Thu, 18 Sep 2014 15:13:24 +0200
+
+atlas.3.10.2 add Power8 cpu
+tracked upstream by issue 67
+https://sourceforge.net/p/math-atlas/patches/67/
+
+Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com>
+---
+ CONFIG/ARCHS/Make.ext               |    7 +++++++
+ CONFIG/include/atlconf.h            |    6 +++---
+ CONFIG/src/atlcomp.txt              |    6 ++++++
+ CONFIG/src/backend/archinfo_aix.c   |    2 ++
+ CONFIG/src/backend/archinfo_linux.c |    1 +
+ include/atlas_pca.h                 |    2 +-
+ 6 files changed, 20 insertions(+), 4 deletions(-)
+
+Index: ATLAS/CONFIG/ARCHS/Make.ext
+===================================================================
+--- ATLAS.orig/CONFIG/ARCHS/Make.ext
++++ ATLAS/CONFIG/ARCHS/Make.ext
+@@ -33,6 +33,7 @@ files = AMD64K10h32SSE3.tar.bz2 AMD64K10
+         MIPSR1xK64.tar.bz2 Makefile P432SSE2.tar.bz2 P4E32SSE3.tar.bz2 \
+         P4E64SSE3.tar.bz2 PIII32SSE1.tar.bz2 POWER432.tar.bz2 \
+         POWER464.tar.bz2 POWER564.tar.bz2 POWER764VSX.tar.bz2 \
++        POWER864VSX.tar.bz2 \
+         PPCG432AltiVec.tar.bz2 PPCG532AltiVec.tar.bz2 PPCG564AltiVec.tar.bz2 \
+         PPRO32.tar.bz2 USIII32.tar.bz2 USIII64.tar.bz2 USIV32.tar.bz2 \
+         USIV64.tar.bz2 UST232.tar.bz2 UST264.tar.bz2 atlas_test1.1.3.tar.bz2 \
+@@ -308,6 +309,12 @@ POWER764VSX.tar.bz2 : $(basdr)/POWER764V
+            /tmp/POWER764VSX.tar POWER764VSX
+ 	bzip2 /tmp/POWER764VSX.tar
+ 	mv /tmp/POWER764VSX.tar.bz2 ./.
++POWER864VSX.tar.bz2 : $(basdr)/POWER864VSX
++	- rm -f /tmp/POWER864VSX.tar /tmp/POWER864VSX.tar.bz2
++	cd $(basdr) ; tar --dereference --exclude 'CVS' -c -f \
++           /tmp/POWER864VSX.tar POWER864VSX
++	bzip2 /tmp/POWER864VSX.tar
++	mv /tmp/POWER864VSX.tar.bz2 ./.
+ IBMz1032.tar.bz2 : $(basdr)/IBMz1032
+ 	- rm -f /tmp/IBMz1032.tar /tmp/IBMz1032.tar.bz2
+ 	cd $(basdr) ; tar --dereference --exclude 'CVS' -c -f \
+Index: ATLAS/CONFIG/include/atlconf.h
+===================================================================
+--- ATLAS.orig/CONFIG/include/atlconf.h
++++ ATLAS/CONFIG/include/atlconf.h
+@@ -18,10 +18,10 @@ enum OSTYPE {OSOther=0, OSLinux, OSSunOS
+ enum ARCHFAM {AFOther=0, AFPPC, AFSPARC, AFALPHA, AFX86, AFIA64, AFMIPS,
+               AFARM, AFS390};
+ 
+-#define NMACH 52
++#define NMACH 53
+ static char *machnam[NMACH] =
+    {"UNKNOWN", "POWER3", "POWER4", "POWER5", "PPCG4", "PPCG5",
+-    "POWER6", "POWER7", "POWERe6500", "IBMz9", "IBMz10", "IBMz196",
++    "POWER6", "POWER7", "POWER8", "POWERe6500", "IBMz9", "IBMz10", "IBMz196",
+     "x86x87", "x86SSE1", "x86SSE2", "x86SSE3",
+     "P5", "P5MMX", "PPRO", "PII", "PIII", "PM", "CoreSolo",
+     "CoreDuo", "Core2Solo", "Core2", "Corei1", "Corei2", "Corei3",
+@@ -31,7 +31,7 @@ static char *machnam[NMACH] =
+     "USI", "USII", "USIII", "USIV", "UST1", "UST2", "UnknownUS",
+     "MIPSR1xK", "MIPSICE9", "ARMv7"};
+ enum MACHTYPE {MACHOther, IbmPwr3, IbmPwr4, IbmPwr5, PPCG4, PPCG5,
+-               IbmPwr6, IbmPwr7, Pwre6500,
++               IbmPwr6, IbmPwr7, IbmPwr8, Pwre6500,
+                IbmZ9, IbmZ10, IbmZ196,  /* s390(x) in Linux */
+                x86x87, x86SSE1, x86SSE2, x86SSE3, /* generic targets */
+                IntP5, IntP5MMX, IntPPRO, IntPII, IntPIII, IntPM, IntCoreS,
+Index: ATLAS/CONFIG/src/atlcomp.txt
+===================================================================
+--- ATLAS.orig/CONFIG/src/atlcomp.txt
++++ ATLAS/CONFIG/src/atlcomp.txt
+@@ -190,6 +190,10 @@ MACH=PPCG5 OS=ALL LVL=1000 COMPS=dmc,icc
+    'gcc' '-mpowerpc64 -maltivec -mabi=altivec -mcpu=970 -mtune=970 -O2'
+ MACH=PPCG5 OS=ALL LVL=1000 COMPS=skc
+    'gcc' '-mpowerpc64 -maltivec -mabi=altivec -mcpu=970 -mtune=970 -O2 -mvrsave'
++MACH=POWER8 OS=ALL LVL=1010 COMPS=icc,smc,dmc,skc,dkc,xcc,gcc
++   'gcc' '-O2 -mvsx -mcpu=power8 -mtune=power8 -m64 -mvrsave -funroll-all-loops'
++MACH=POWER8 OS=ALL LVL=1010 COMPS=f77
++   'gfortran' '-O2 -mvsx -mcpu=power8 -mtune=power8 -m64 -mvrsave -funroll-all-loops'
+ MACH=POWER7 OS=ALL LVL=1010 COMPS=icc,smc,dmc,skc,dkc,xcc,gcc
+    'gcc' '-O2 -mvsx -mcpu=power7 -mtune=power7 -m64 -mvrsave -funroll-all-loops'
+ MACH=POWER7 OS=ALL LVL=1010 COMPS=f77
+@@ -210,6 +214,8 @@ MACH=POWER4 OS=ALL LVL=1010 COMPS=icc,dm
+    'gcc' '-mcpu=power4 -mtune=power4 -O3 -fno-schedule-insns -fno-rerun-loop-opt'
+ MACH=POWER4 OS=ALL LVL=1010 COMPS=f77
+    'xlf' '-qtune=pwr4 -qarch=pwr4 -O3 -qmaxmem=-1 -qfloat=hsflt'
++MACH=POWER8 OS=ALL LVL=1010 COMPS=f77
++   'xlf' '-qtune=pwr8 -qarch=pwr8 -O3 -qmaxmem=-1 -qfloat=hsflt'
+ #
+ # IBM System z or zEnterprise.
+ # These compiler flags given by IBM; -O3 -funroll-loops are chosen because
+Index: ATLAS/CONFIG/src/backend/archinfo_linux.c
+===================================================================
+--- ATLAS.orig/CONFIG/src/backend/archinfo_linux.c
++++ ATLAS/CONFIG/src/backend/archinfo_linux.c
+@@ -77,6 +77,7 @@ enum MACHTYPE ProbeArch()
+          else if (strstr(res, "7455")) mach = PPCG4;
+          else if (strstr(res, "PPC970FX")) mach = PPCG5;
+          else if (strstr(res, "PPC970MP")) mach = PPCG5;
++         else if (strstr(res, "POWER8")) mach = IbmPwr8;
+          else if (strstr(res, "POWER7")) mach = IbmPwr7;
+          else if (strstr(res, "POWER6")) mach = IbmPwr6;
+          else if (strstr(res, "POWER5")) mach = IbmPwr5;
+Index: ATLAS/include/atlas_pca.h
+===================================================================
+--- ATLAS.orig/include/atlas_pca.h
++++ ATLAS/include/atlas_pca.h
+@@ -26,7 +26,7 @@
+    #endif
+ #elif defined(ATL_ARCH_POWER3) || defined(ATL_ARCH_POWER4) || \
+       defined(ATL_ARCH_POWER5) || defined(ATL_ARCH_POWER6) || \
+-      defined(ATL_ARCH_POWER7)
++      defined(ATL_ARCH_POWER7) || defined(ATL_ARCH_POWER8)
+    #ifdef __GNUC__
+       #define ATL_membarrier __asm__ __volatile__ ("dcs")
+ /*      #define ATL_USEPCA 1 */
+Index: ATLAS/CONFIG/src/backend/archinfo_aix.c
+===================================================================
+--- ATLAS.orig/CONFIG/src/backend/archinfo_aix.c
++++ ATLAS/CONFIG/src/backend/archinfo_aix.c
+@@ -67,6 +67,8 @@ enum MACHTYPE ProbeArch()
+       {
+          if (strstr(res, "PowerPC_POWER5"))
+             mach = IbmPwr5;
++         else if (strstr(res, "PowerPC_POWER8"))
++            mach = IbmPwr8;
+          else if (strstr(res, "PowerPC_POWER7"))
+             mach = IbmPwr7;
+          else if (strstr(res, "PowerPC_POWER6"))

atlas.3.10.2-ppc64le_abiv2.patch

@@ -0,0 +1,220 @@
+From: Michel Normand <normand@linux.vnet.ibm.com>
+Subject: atlas.3.10.2 ppc64le abiv2 patch
+Date: Mon, 28 Jul 2014 04:29:05 -0400
+
+atlas.3.10.2 abiv2 step2 complete the changes already present in atlas 3.10.2
+* still some files with opd ABI V1 to be disabled for ABI V2
+ tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c
+ tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c
+ tune/blas/gemm/CASES/ATL_smm4x4x128_av.c
+
+atlas.3.10.2 ppc64le abiv2 step3
+* change offsets of parameters read from stack to avoid some segfaults.
+  (values changes 120 => 104 and 128 => 112 identified by gdb investigation)
+
+Despite this step3 patch there are two Remaining problems for ppc64le archi:
+* TODO: still have seg-faults in console during build/check
+but is not critical (without make check) and rpm are generated on fedora.
+unable to investigate because of problem tracked by issue 950
+https://sourceforge.net/p/math-atlas/support-requests/950/
+
+* TODO: make check failure because xsslvtst execution failure
+related to vector assembly code that assumes big-endian env
+as written in ATL_cmm4x4x128_av.c and ATL_smm4x4x128_av.c.
+Would need significant work to support little-endian as per
+endianess comments of all PowerPC vector instructions in:
+https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/FBFA164F824370F987256D6A006F424D/$file/vector_simd_pem.ppc.2005AUG23.pdf
+
+Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com>
+---
+ tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c |    7 +++++++
+ tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c |    7 +++++++
+ tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c |    9 ++++++++-
+ tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c |   20 ++++++++++++++++++--
+ tune/blas/gemm/CASES/ATL_smm4x4x128_av.c |   23 ++++++++++++++++++++++-
+ 5 files changed, 62 insertions(+), 4 deletions(-)
+
+Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c
++++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c
+@@ -268,7 +268,7 @@ Mjoin(.,ATL_USERMM):
+ 	.globl  Mjoin(_,ATL_USERMM)
+ Mjoin(_,ATL_USERMM):
+    #else
+-      #if defined(ATL_USE64BITS)
++      #if defined(ATL_USE64BITS) && _CALL_ELF != 2
+ /*
+  *      Official Program Descripter section, seg fault w/o it on Linux/PPC64
+  */
+@@ -324,8 +324,15 @@ ATL_USERMM:
+ #endif
+ 
+ #ifdef ATL_USE64BITS
++#if _CALL_ELF == 2
++/* ABIv2 */
++        ld      pC0, 104(r1)
++        ld      incCn, 112(r1)
++#else
++/* ABIv1 */
+         ld      pC0, 120(r1)
+         ld      incCn, 128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC) || defined(ATL_AS_AIX_PPC)
+         lwz     pC0, 68(r1)
+         lwz     incCn,  72(r1)
+Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c
++++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c
+@@ -170,13 +170,21 @@ void ATL_USERMM(const int M, const int N
+                 const TYPE beta, TYPE *C, const int ldc)
+                                   (r10)    8(r1)
+ *******************************************************************************
+-64 bit ABIs:
++64 bit ABIv1s:
+                          r3           r4           r5             r6/f1
+ void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha,
+                            r7             r8             r9            r10
+                 const TYPE *A, const int lda, const TYPE *B, const int ldb,
+                              f2   120(r1)        128(r1)
+                 const TYPE beta, TYPE *C, const int ldc)
++
++64 bit ABIv2s:
++                         r3           r4           r5             r6/f1
++void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha,
++                           r7             r8             r9            r10
++                const TYPE *A, const int lda, const TYPE *B, const int ldb,
++                             f2   104(r1)        112(r1)
++                const TYPE beta, TYPE *C, const int ldc)
+ #endif
+ #ifdef ATL_AS_AIX_PPC
+         .csect .text[PR]
+@@ -202,7 +210,7 @@ Mjoin(.,ATL_USERMM):
+ 	.globl  Mjoin(_,ATL_USERMM)
+ Mjoin(_,ATL_USERMM):
+    #else
+-      #if defined(ATL_USE64BITS)
++      #if defined(ATL_USE64BITS) && _CALL_ELF != 2
+ /*
+  *      Official Program Descripter section, seg fault w/o it on Linux/PPC64
+  */
+@@ -257,9 +265,17 @@ ATL_USERMM:
+    #endif
+ #endif
+ 
++
+ #if defined (ATL_USE64BITS)
++#if _CALL_ELF == 2
++/* ABIv2 */
++        ld      pC0, 104(r1)
++        ld      incCn, 112(r1)
++#else
++/* ABIv1 */
+         ld      pC0, 120(r1)
+         ld      incCn, 128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC) || defined(ATL_AS_AIX_PPC)
+         lwz     pC0, 68(r1)
+         lwz     incCn,  72(r1)
+Index: ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c
++++ ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c
+@@ -196,7 +196,7 @@ void ATL_USERMM(const int M, const int N
+ 	.globl  Mjoin(_,ATL_USERMM)
+ Mjoin(_,ATL_USERMM):
+ #else
+-   #if defined(ATL_USE64BITS)
++   #if defined(ATL_USE64BITS) && _CALL_ELF != 2
+ /*
+  *      Official Program Descripter section, seg fault w/o it on Linux/PPC64
+  */
+@@ -221,8 +221,15 @@ ATL_USERMM:
+  *      kernel instead
+  */
+ #if defined (ATL_USE64BITS)
++#if _CALL_ELF == 2
++/* ABIv2 */
++        ld      r10, 104(r1)
++        ld      r5, 112(r1)
++#else
++/* ABIv1 */
+         ld      r10, 120(r1)
+         ld      r5, 128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC)
+         lwz     r10, 60(r1)
+         lwz     r5,  64(r1)
+@@ -285,8 +292,15 @@ ATL_USERMM:
+         eqv     r0, r0, r0      /* all 1s */
+         ATL_WriteVRSAVE(r0)     /* signal we use all vector regs */
+ #if defined (ATL_USE64BITS)
++#if _CALL_ELF == 2
++        /* ABIv2 */
++        ld      pC0, FSIZE+104(r1)
++        ld      ldc, FSIZE+112(r1)
++#else
++        /* ABIv1 */
+         ld      pC0, FSIZE+120(r1)
+         ld      ldc, FSIZE+128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC)
+         lwz     pC0, FSIZE+60(r1)
+         lwz     ldc,  FSIZE+64(r1)
+@@ -4258,8 +4272,15 @@ UNALIGNED_C:
+         eqv     r0, r0, r0      /* all 1s */
+         ATL_WriteVRSAVE(r0)     /* signal we use all vector regs */
+ #if defined (ATL_USE64BITS)
++#if _CALL_ELF == 2
++        /* ABIv2 */
++        ld      pC0, FSIZE+104(r1)
++        ld      ldc, FSIZE+112(r1)
++#else
++        /* ABIv1 */
+         ld      pC0, FSIZE+120(r1)
+         ld      ldc, FSIZE+128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC)
+         lwz     pC0, FSIZE+60(r1)
+         lwz     ldc,  FSIZE+64(r1)
+Index: ATLAS/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c
++++ ATLAS/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c
+@@ -258,8 +258,15 @@ ATL_USERMM:
+         eqv     r0, r0, r0      /* all 1s */
+         ATL_WriteVRSAVE(r0)     /* signal we use all vector regs */
+ #if defined (ATL_USE64BITS)
++#if _CALL_ELF == 2
++/* ABIv2 */
++        ld      pC0, FSIZE+104(r1)
++        ld      ldc, FSIZE+112(r1)
++#else
++/* ABIv1 */
+         ld      pC0, FSIZE+120(r1)
+         ld      ldc, FSIZE+128(r1)
++#endif
+ #elif defined(ATL_AS_OSX_PPC)
+         lwz     pC0, FSIZE+60(r1)
+         lwz     ldc,  FSIZE+64(r1)
+Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c
++++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c
+@@ -405,8 +405,15 @@ Mjoin(_,ATL_USERMM):
+  */
+ #ifdef ATL_GAS_LINUX_PPC
+    #ifdef ATL_USE64BITS
++      #if _CALL_ELF == 2
++      /* ABIv2 */
++        ld      pC0, 104(r1)
++        ld      incCn, 112(r1)
++      #else
++      /* ABIv1 */
+ 	ld 	pC0, 120(r1)
+ 	ld 	incCn, 128(r1)
++      #endif
+    #else
+ 	lwz	incCn, FSIZE+8(r1)
+    #endif

atlas.3.10.2-ppc64le_do_not_use_files_with_lvx.patch

@@ -0,0 +1,151 @@
+From: Michel Normand <normand@linux.vnet.ibm.com>
+Subject: atlas.3.10.2 ppc64le do not use files with lvx
+Date: Tue, 12 Aug 2014 16:07:06 +0200
+
+ppc64le do not use files with lvx
+This is a temporary patch as long as the related files
+are not ported yet to ppc64 little-endian.
+
+Warning: patch to be applied only for ppc64le architecture
+and will also need atlas-new_archdef_for_ppc64le.patch
+
+Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com>
+---
+ tune/blas/gemm/CASES/ccases.flg |    6 +-----
+ tune/blas/gemm/CASES/dcases.flg |    8 +-------
+ tune/blas/gemm/CASES/dcases.vnb |    4 ----
+ tune/blas/gemm/CASES/scases.flg |    9 +--------
+ tune/blas/gemm/CASES/scases.vnb |    3 ---
+ tune/blas/gemm/CASES/zcases.flg |    8 +-------
+ 6 files changed, 4 insertions(+), 34 deletions(-)
+
+Index: ATLAS/tune/blas/gemm/CASES/ccases.flg
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/ccases.flg
++++ ATLAS/tune/blas/gemm/CASES/ccases.flg
+@@ -1,5 +1,5 @@
+ <ID> <flag> <mb> <nb> <kb> <muladd> <lat> <mu> <nu> <ku> <rout> "<Contributer>"
+-24
++22
+ 304 192 4 3 8 0 4 4 3 8 ATL_mm4x3x8p.c     "R. Clint Whaley" \
+ gcc
+ -mcpu=ultrasparc -mtune=ultrasparc -fomit-frame-pointer -O
+@@ -48,13 +48,9 @@ gcc
+ 328 480 8 8 2 1 1 8 8 2 ATL_mm8x8x2.c  "R. Clint Whaley" \
+ gcc
+ -fomit-frame-pointer -O2 -fno-tree-loop-optimize
+-329 192 4 4 4 1 16 4 4 4 ATL_cmm4x4x128_av.c "R. Clint Whaley" \
+-gcc
+--x assembler-with-cpp
+ 331 192 4 4 1 1 1 4 4 1 ATL_smm4x4xURx_mips.c  "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mips4
+-332 192 8 2 4 1 0 8 2 4 ATL_smm8x2x4_av.c  "IBM"
+ 333 448 4 4 2 1 1 4 4 2 ATL_smm4x4x2pf_arm.c "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mfpu=vfpv3
+Index: ATLAS/tune/blas/gemm/CASES/scases.flg
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/scases.flg
++++ ATLAS/tune/blas/gemm/CASES/scases.flg
+@@ -1,5 +1,5 @@
+ <ID> <flag> <mb> <nb> <kb> <muladd> <lat> <mu> <nu> <ku> <rout> "<Contributer>"
+-25
++22
+ 304 192 4 3 8 0 4 4 3 8 ATL_mm4x3x8p.c     "R. Clint Whaley" \
+ gcc
+ -mcpu=ultrasparc -mtune=ultrasparc -fomit-frame-pointer -O
+@@ -48,16 +48,9 @@ gcc
+ 328 480 8 8 2 1 1 8 8 2 ATL_mm8x8x2.c  "R. Clint Whaley" \
+ gcc
+ -fomit-frame-pointer -O2 -fno-tree-loop-optimize
+-329 192 4 4 4 1 16 4 4 4 ATL_smm4x4x128_av.c "R. Clint Whaley" \
+-gcc
+--x assembler-with-cpp
+-330 200 92 92 92 1 16 92 92 92 ATL_smm4x4x128_av.c "R. Clint Whaley" \
+-gcc
+--x assembler-with-cpp
+ 331 192 4 4 1 1 1 4 4 1 ATL_smm4x4xURx_mips.c  "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mips4
+-332 192 8 2 4 1 0 8 2 4 ATL_smm8x2x4_av.c  "IBM"
+ 333 448 4 4 2 1 1 4 4 2 ATL_smm4x4x2pf_arm.c "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mfpu=vfpv3
+Index: ATLAS/tune/blas/gemm/CASES/scases.vnb
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/scases.vnb
++++ ATLAS/tune/blas/gemm/CASES/scases.vnb
+@@ -31,9 +31,6 @@
+ # Defaults: TA='t', TB='n', SSE=0, X87=0, LDBOT=1, RTKU=0, AOUTER=0,
+ #           KBMAX=KU, KBMIN=KU, BETAN1=0, RTMN=1
+ #
+-ID=1  ROUT='ATL_smm4x4x128_av.c' AUTH='R. Clint Whaley' MU=4 NU=4 KU=4 \
+-      LDKB=1 LDBOT=1 KBMIN=4 KBMAX=128 ASM=GAS_PPC \
+-      COMP='gcc' FLAGS='-x assembler-with-cpp'
+ ID=2  ROUT='ATL_smm4x4x16_av.c' AUTH='R. Clint Whaley' MU=4 NU=4 KU=16 \
+       LDKB=1 LDBOT=0 KBMIN=16 KBMAX=2048 ASM=GAS_SPARC \
+       COMP='gcc' FLAGS='-x assembler-with-cpp'
+Index: ATLAS/tune/blas/gemm/CASES/dcases.flg
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/dcases.flg
++++ ATLAS/tune/blas/gemm/CASES/dcases.flg
+@@ -1,5 +1,5 @@
+ <ID> <flag> <mb> <nb> <kb> <muladd> <lat> <mu> <nu> <ku> <rout> "<Contributer>"
+-32
++30
+ 306 192 4 3 8 0 4 4 3 8 ATL_mm4x3x8p.c     "R. Clint Whaley" \
+ gcc
+ -mcpu=ultrasparc -mtune=ultrasparc -fomit-frame-pointer -O -fno-schedule-insns -fno-schedule-insns2
+@@ -79,12 +79,6 @@ gcc
+ 336 192 4 4 1 1 1 4 4 1 ATL_dmm4x4xURx_mips.c  "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mips4
+-337 192 4 4 1 1 16 4 4 1 ATL_dmm4x4x80_ppc.c "Whaley & Castaldo" \
+-gcc
+--x assembler-with-cpp
+-338 192 8 4 2 1 0 8 4 2  ATL_dmm8x4x2_vsx.c  "IBM" \
+-gcc
+--O3 -mvsx
+ 339 448 4 4 2 1 1 4 4 2 ATL_dmm4x4x2pf_arm.c "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mfpu=vfpv3
+Index: ATLAS/tune/blas/gemm/CASES/dcases.vnb
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/dcases.vnb
++++ ATLAS/tune/blas/gemm/CASES/dcases.vnb
+@@ -53,10 +53,6 @@ ID=6  ROUT='ATL_dmm4x1x90_x87.c' AUTH='R
+ ID=7  ROUT='ATL_dmm8x1x120_sse2.c' AUTH='R. Clint Whaley' \
+       MU=8 NU=1 KU=1 KBMAX=512 ASM=GAS_x8664 BETAN1=1 \
+       COMP='gcc' FLAGS='-m64 -x assembler-with-cpp'
+-ID=70 ROUT='ATL_dmm4x4x80_ppc.c' AUTH='R. Clint Whaley' TA='T', TB='N' \
+-      MU=4 NU=4 KU=1 KBMIN=1 KBMAX=80 ASM=GAS_PPC BETAN1=0 LDBOT=0 \
+-      LDAB=0 LDISKB=1 RTN=1 RTM=1 RTK=0 \
+-      COMP='gcc' FLAGS='-x assembler-with-cpp'
+ ID=80 ROUT='ATL_dmm4x4x16r8_US.c' AUTH='R. Clint Whaley' TA='T', TB='N' \
+       MU=4 NU=4 KU=24 KBMIN=24 KBMAX=512 ASM=GAS_SPARC BETAN1=0 \
+       LDAB=0 RTK=1 RTN=1 RTM=1 LDBOT=0 LDISKB=1 LDAB=1 \
+Index: ATLAS/tune/blas/gemm/CASES/zcases.flg
+===================================================================
+--- ATLAS.orig/tune/blas/gemm/CASES/zcases.flg
++++ ATLAS/tune/blas/gemm/CASES/zcases.flg
+@@ -1,5 +1,5 @@
+ <ID> <flag> <mb> <nb> <kb> <muladd> <lat> <mu> <nu> <ku> <rout> "<Contributer>"
+-31
++29
+ 306 192 4 3 8 0 4 4 3 8 ATL_mm4x3x8p.c     "R. Clint Whaley" \
+ gcc
+ -mcpu=ultrasparc -mtune=ultrasparc -fomit-frame-pointer -O -fno-schedule-insns -fno-schedule-insns2
+@@ -76,12 +76,6 @@ gcc
+ 336 192 4 4 1 1 1 4 4 1 ATL_dmm4x4xURx_mips.c  "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mips4
+-337 192 4 4 1 1 16 4 4 1 ATL_dmm4x4x80_ppc.c "Whaley & Castaldo" \
+-gcc
+--x assembler-with-cpp
+-338 192 8 4 2 1 0 8 4 2  ATL_dmm8x4x2_vsx.c  "IBM" \
+-gcc
+--O3 -mvsx
+ 339 448 4 4 2 1 1 4 4 2 ATL_dmm4x4x2pf_arm.c "R. Clint Whaley" \
+ gcc
+ -x assembler-with-cpp -mfpu=vfpv3

getdoublearr.stripwhite.patch

@@ -1,18 +1,6 @@
-Subject: getdoublearr.stripwhite
-From: Michel Normand <normand@fr.ibm.com>
-
-GetDoubleArr must only handle the comma delimited list at string head
-and ignore anything after the first blank character.
-
-Signed-off-by: Michel Normand <normand@fr.ibm.com>
----
- ATLAS/include/atlas_genparse.h |   16 ++++++++++++++--
- 1 file changed, 14 insertions(+), 2 deletions(-)
-
-Index: atlas/ATLAS/include/atlas_genparse.h
-===================================================================
---- atlas.orig/ATLAS/include/atlas_genparse.h
-+++ atlas/ATLAS/include/atlas_genparse.h
+diff -up ATLAS/include/atlas_genparse.h.than ATLAS/include/atlas_genparse.h
+--- ATLAS/include/atlas_genparse.h.than	2015-11-26 10:53:55.056586198 -0500
++++ ATLAS/include/atlas_genparse.h	2015-11-26 10:56:00.168537914 -0500
 @@ -149,13 +149,24 @@ static int asmNames2bitfield(char *str)
  }
  
@@ -40,8 +28,8 @@ Index: atlas/ATLAS/include/atlas_genparse.h
     assert(sscanf(str, "%le", d) == 1);
     while (i < N)
     {
-@@ -166,6 +177,7 @@ static int GetDoubleArr(char *str, int N
-	break;
+@@ -167,6 +178,7 @@ static int GetDoubleArr(char *str, int N
+ 	break;
        i++;
     }
 +   free(dupstr);

initialize_malloc_memory.invtrsm.wms.oct23.patch

@@ -1,6 +1,22 @@
---- ./ATLAS.first/tune/blas/level3/invtrsm.c	2013-10-22 19:35:03.000000000 +0000
-+++ ./ATLAS/tune/blas/level3/invtrsm.c	2013-10-23 21:24:01.000000000 +0000
-@@ -525,6 +525,7 @@
+From: Michel Normand <normand@linux.vnet.ibm.com>
+Subject: initialize malloc memory.invtrsm.wms.oct23
+Date: Mon, 14 Apr 2014 17:18:53 +0200
+References: http://sourceforge.net/p/math-atlas/mailman/message/32471499/
+
+initialize malloc memory invtrsm.c
+
+
+Signed-off-by:  Will Schmidt <will_schmidt@vnet.ibm.com>
+Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com>
+---
+ ATLAS/tune/blas/level3/invtrsm.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+Index: ATLAS/tune/blas/level3/invtrsm.c
+===================================================================
+--- ATLAS.orig/tune/blas/level3/invtrsm.c
++++ ATLAS/tune/blas/level3/invtrsm.c
+@@ -525,6 +525,7 @@ static double RunTiming
     a = A = malloc(i * ATL_MulBySize(incA));
     if (A)
     {

p8-mem-barrier.patch

@@ -1,12 +0,0 @@
-diff -Naur ATLAS.orig/include/atlas_pca.h ATLAS/include/atlas_pca.h
---- ATLAS.orig/include/atlas_pca.h	2013-01-08 19:15:40.000000000 +0100
-+++ ATLAS/include/atlas_pca.h	2014-10-23 13:45:36.956698637 +0200
-@@ -26,7 +26,7 @@
-    #endif
- #elif defined(ATL_ARCH_POWER3) || defined(ATL_ARCH_POWER4) || \
-       defined(ATL_ARCH_POWER5) || defined(ATL_ARCH_POWER6) || \
--      defined(ATL_ARCH_POWER7)
-+      defined(ATL_ARCH_POWER7) || 1
-    #ifdef __GNUC__
-       #define ATL_membarrier __asm__ __volatile__ ("dcs")
- /*      #define ATL_USEPCA 1 */

ppc64le-abiv2.patch

@@ -1,60 +0,0 @@
---- atlas/ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c	2013-12-05 19:19:57.000000000 +0100
-+++ atlas/ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c.new	2013-12-06 16:29:57.000000000 +0100
-@@ -170,13 +170,21 @@ void ATL_USERMM(const int M, const int N
-                 const TYPE beta, TYPE *C, const int ldc)
-                                   (r10)    8(r1)
- *******************************************************************************
--64 bit ABIs:
-+64 bit ABIv1s:
-                          r3           r4           r5             r6/f1
- void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha,
-                            r7             r8             r9            r10
-                 const TYPE *A, const int lda, const TYPE *B, const int ldb,
-                              f2   120(r1)        128(r1)
-                 const TYPE beta, TYPE *C, const int ldc)
-+
-+64 bit ABIv2s:
-+                         r3           r4           r5             r6/f1
-+void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha,
-+                           r7             r8             r9            r10
-+                const TYPE *A, const int lda, const TYPE *B, const int ldb,
-+                             f2   104(r1)        112(r1)
-+                const TYPE beta, TYPE *C, const int ldc)
- #endif
- #ifdef ATL_AS_AIX_PPC
-         .csect .text[PR]
-@@ -202,7 +210,7 @@ Mjoin(.,ATL_USERMM):
- 	.globl  Mjoin(_,ATL_USERMM)
- Mjoin(_,ATL_USERMM):
-    #else
--      #if defined(ATL_USE64BITS)
-+      #if defined(ATL_USE64BITS) && _CALL_ELF != 2
- /*
-  *      Official Program Descripter section, seg fault w/o it on Linux/PPC64
-  */
-@@ -217,6 +225,7 @@ ATL_USERMM:
- 	.globl  Mjoin(.,ATL_USERMM)
- Mjoin(.,ATL_USERMM):
-       #else
-+/* ppc64 have no longer function descriptors in ABIv2 */      
- 	.globl  ATL_USERMM
- ATL_USERMM:
-       #endif
-@@ -257,9 +266,17 @@ ATL_USERMM:
-    #endif
- #endif
- 
-+
- #if defined (ATL_USE64BITS)
-+#if _CALL_ELF == 2
-+/* ABIv2 */
-+        ld      pC0, 104(r1)
-+        ld      incCn, 112(r1)
-+#else
-+/* ABIv1 */
-         ld      pC0, 120(r1)
-         ld      incCn, 128(r1)
-+#endif
- #elif defined(ATL_AS_OSX_PPC) || defined(ATL_AS_AIX_PPC)
-         lwz     pC0, 68(r1)
-         lwz     incCn,  72(r1)

ppc64le-remove-vsx.patch

@@ -1,37 +0,0 @@
-Subject: ppc64le remove vsx
-From: Michel Normand <normand@fr.ibm.com>
-
-temporarily remove the vsx related flags
-as long as not supported for ppc64le
-Note that also force as power4
-
-Signed-off-by: Michel Normand <normand@fr.ibm.com>
-diff -up ATLAS/CONFIG/src/atlcomp.txt.orig ATLAS/CONFIG/src/atlcomp.txt
---- ATLAS/CONFIG/src/atlcomp.txt.orig	2014-07-10 18:22:02.000000000 +0200
-+++ ATLAS/CONFIG/src/atlcomp.txt	2015-07-09 09:44:07.270264073 +0200
-@@ -191,9 +191,9 @@ MACH=PPCG5 OS=ALL LVL=1000 COMPS=dmc,icc
- MACH=PPCG5 OS=ALL LVL=1000 COMPS=skc
-    'gcc' '-mpowerpc64 -maltivec -mabi=altivec -mcpu=970 -mtune=970 -O2 -mvrsave'
- MACH=POWER7 OS=ALL LVL=1010 COMPS=icc,smc,dmc,skc,dkc,xcc,gcc
--   'gcc' '-O2 -mvsx -mcpu=power7 -mtune=power7 -m64 -mvrsave -funroll-all-loops'
-+   'gcc' '-O2 -m64 -mvrsave -funroll-all-loops'
- MACH=POWER7 OS=ALL LVL=1010 COMPS=f77
--   'gfortran' '-O2 -mvsx -mcpu=power7 -mtune=power7 -m64 -mvrsave -funroll-all-loops'
-+   'gfortran' '-O2 -m64 -mvrsave -funroll-all-loops'
- MACH=POWER6 OS=ALL LVL=1010 COMPS=icc,smc,dmc,skc,dkc,xcc,gcc
-    'gcc' '-mcpu=power6 -mtune=power6 -maltivec -O3 -fno-schedule-insns -fschedule-insns2 -minsert-sched-nops=2'
- MACH=POWER5 OS=ALL LVL=1010 COMPS=icc,smc,dmc,skc,dkc,xcc,gcc
-diff -up ATLAS/CONFIG/src/probe_comp.c.orig ATLAS/CONFIG/src/probe_comp.c
---- ATLAS/CONFIG/src/probe_comp.c.orig	2015-07-09 09:44:07.280264074 +0200
-+++ ATLAS/CONFIG/src/probe_comp.c	2015-07-09 09:45:51.480266328 +0200
-@@ -450,8 +450,8 @@ COMPNODE **GetDefaultComps(enum OSTYPE O
-       vp = "-mavx -mno-sse2avx -mfma";
-    else if ((vecexts & (1<<ISA_AVXMAC)))
-       vp = "-mavx2 -mfma";
--   else if (vecexts & (1<<ISA_VSX))
--      vp = "-mvsx";
-+   /*else if (vecexts & (1<<ISA_VSX))
-+      vp = "-mvsx";*/
-    else if (vecexts & (1<<ISA_AV))
-       vp = "-maltivec";
-    else if (vecexts & (1<<ISA_AVX))

sources

@@ -1,13 +1,17 @@
-a4e21f343dec8f22e7415e339f09f6da  atlas3.10.2.tar.bz2
-9ddf8c76e5e9781c542b712f704460e1  IBMz1032.tgz
-ee4cbc1f15cb4cd5f5266969a4bc62a7  IBMz1064.tgz
-edd3cb5602c6282e4a30691e728bd064  IBMz19632.tgz
-21f630520058859ad0b8b798bd17dc5a  IBMz19664.tgz
-3f174cdcb4c964843f27dbfc4ad4b1c8  K7323DNow.tgz
-676548252837b1e458181111443f340f  PPRO32.tgz
-ebb4732aff468bbc223e7f734252173b  USII32.tgz
-31f8ae7583d290e5414a1a61ff6e7e39  USII64.tgz
-93f108a072913fa1dbb2fcb6ca7c229a  IBMz932.tar.bz2
-f3e4ca175b5ffc49dce7f3c37f791827  IBMz964.tar.bz2
-27e7baa49c588299260188afa78303dc  POWER332.tar.bz2
-af1f95e19d7afaf0342fb1377ec94817  ARMv732NEON.tar.bz2
+SHA512 (atlas3.10.3.tar.bz2) = bf17306f09f2aa973cb776e2c9eacfb2409ad4d95d19802e1c4e0597d0a099fccdb5eaafe273c2682a41e41a3c6fabc8bbba4ce03180cffea40ede5df1d1f56e
+SHA512 (IBMz1032.tgz) = f745187d75073de461d6948489dad3abea9a67ad10ec63e021160d3f61ae5be36e94768faa0e7e6e3158b1401bf954eae1e7e6416857b652415030836c6aba3d
+SHA512 (IBMz1064.tgz) = 14fbc584a8711a0292c8be0dce962bd7ac12347b2d203c2a7b0cc66ea68ac57d5b88afc6778df39efea43077fcc70c6c63db365b5b4badb879ab6900b5296094
+SHA512 (IBMz1264.tar.bz2) = 54bab951a818feb08fe5c671213db80d17bfefe75a3993d80655161219f018e87125c4ccc09c701cde45fd672a9856f4fff557ffc378c5b2fe7e9c6ebc3bd1de
+SHA512 (IBMz19632.tgz) = aa10213265866b3176efe1d9d204da170844573f7ab26a36551a174eab3951ccd5f54a5149f1351affc38c510162cce9e10eb2a830af32992cb3febe9e1ecafe
+SHA512 (IBMz19664.tgz) = 5837d5dfd04c31c304e1f454d0148bd412ec8853c50a7c3dcee9a61529bd04c30d68a0c7aae2bfa2c393fde3582fe36f98e6f5891b271b19562491298ba600b2
+SHA512 (IBMz932.tar.bz2) = 8f71140d1b30d00ed44faea71e42ab3ff24917a62670f7becdb0d861bf4e7c3c972f9601d161439a518dcc87405c74af31cdd4e2996999a5da8452cc8d2a52df
+SHA512 (IBMz964.tar.bz2) = b7356e5b47615c64c9b2dd6a497f071e39d4d90f6dd42478fea1d7597cf21ea08123c480fde002aba181a2ad0eeb21acb61469c7e4b2e8961e4d72e5f86e14cc
+SHA512 (PPRO32.tgz) = a30069e79f95a36b2c7125e7861218e9612bd92913db929ea98800201e7ca7d55c9a1480063c7d5a4c50fcb2b271907ce43cd9b229c694a5ee3b56561a7820e6
+SHA512 (USII32.tgz) = e9d3b1f5ccd38fc364666205e33f7a927e96c3cebc35d9692cafe3b536697224f20702641f875421b200ff78774831fd5790174ef55c899e0cdb905e3ac2371f
+SHA512 (USII64.tgz) = 5bd654f8b45306a18f3ad2b593ba23012909ba5ad91614de5024b80998bde832d0ddc84d2c0c0e75dd28915f3c07ec40ac9351213b24e54028fbad4d385ebcc6
+SHA512 (POWER332.tar.bz2) = 95a7281dbb7a2d0897a58599577afdedba66e6e5edb73223efdeecd93b6706031139b9b58b14345449dccbf1abfa8275bc261f826c692282d14dc30320728c75
+SHA512 (ARMv732NEON.tar.bz2) = 92acbdd8f7aebd841a10a13df85baa00c518dae388e1ee8dd4bc35fc461d732d2df2cfeae0a3614cea251b80a9ee6a5b49ad71ab8b36b98b70bda6d1c215c78d
+SHA512 (ARMa732.tar) = 47d6564b5a439bc3778ccc79242220b236c7dc8d36e12ce6850c7e9a02e2379618322c003ba4490573c40b78227c2c3925222da4f4e5f87aab48eae192b45bb9
+SHA512 (ARMa732.tar.bz2) = 8b83b59a32f18d2cd432c205efd4358b0000ce1685799f2f38a60532bc925e9cd871371d2dfd226ab8e30e830bf608f022d63bcd26f26f9fe74acab067bd4d4f
+SHA512 (POWER864LEVSXp4.tar.bz2) = e2fa637061a4a4806bc091009c37ccd719c4c4051baf36ed451917e255375881fa168caa5ca296ae9c89bb28523d9015fda42a5dbc51aef4c66efbf6efd966d2
+SHA512 (K7323DNow.tgz) = e1d5e4208ce454b5f5daa68663d2dd28a2bd3cc97496e4e1515df880b9ccd00bcc75bd820402c3b2bf8409f98500e43f2481fbf5dd480f7d0ba60fe2f82a1ac1

xlf.command.not.found.patch

@@ -1,24 +0,0 @@
-Subject: xlf.command.not.found
-From: Michel Normand <normand@fr.ibm.com>
-
-try to bypass error while building ppc64le
-"make[2]: xlf: Command not found"
-
-Signed-off-by: Michel Normand <normand@fr.ibm.com>
----
- ATLAS/CONFIG/src/atlcomp.txt |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-Index: atlas/ATLAS/CONFIG/src/atlcomp.txt
-===================================================================
---- atlas.orig/ATLAS/CONFIG/src/atlcomp.txt
-+++ atlas/ATLAS/CONFIG/src/atlcomp.txt
-@@ -199,7 +199,7 @@ MACH=POWER6 OS=ALL LVL=1010 COMPS=f77
- MACH=POWER5 OS=ALL LVL=1010 COMPS=f77
-    'gfortran' '-mcpu=power5 -mtune=power5 -O3 -fno-schedule-insns -fno-rerun-loop-opt'
- MACH=POWER7 OS=ALL LVL=1010 COMPS=f77
--   'xlf' '-qtune=pwr7 -qarch=pwr7 -O3 -qmaxmem=-1 -qfloat=hsflt'
-+   'gfortran' '-O2 -m64 -mvrsave -funroll-all-loops'
- MACH=POWER5 OS=ALL LVL=1010 COMPS=f77
-    'xlf' '-qtune=pwr5 -qarch=pwr5 -O3 -qmaxmem=-1 -qfloat=hsflt'
- MACH=POWER4 OS=ALL LVL=1010 COMPS=icc,dmc,smc,dkc,skc,xcc,gcc