Add support for RISC-V (riscv64)
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
This commit is contained in:
parent
709845b89e
commit
f82ef1f630
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@ -0,0 +1,239 @@
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diff --git a/CONFIG/include/atlconf.h b/CONFIG/include/atlconf.h
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index e51d56d..5aa3576 100644
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--- a/CONFIG/include/atlconf.h
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+++ b/CONFIG/include/atlconf.h
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@@ -16,7 +16,7 @@ enum OSTYPE {OSOther=0, OSLinux, OSSunOS, OSSunOS4, OSOSF1, OSIRIX, OSAIX,
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((OS_) == OSWin64) )
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enum ARCHFAM {AFOther=0, AFPPC, AFSPARC, AFALPHA, AFX86, AFIA64, AFMIPS,
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- AFARM, AFS390};
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+ AFARM, AFS390, AFRISCV64};
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/*
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* Corei1: Nahalem / Westmere
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@@ -25,7 +25,7 @@ enum ARCHFAM {AFOther=0, AFPPC, AFSPARC, AFALPHA, AFX86, AFIA64, AFMIPS,
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* Corei3EP: v3 Haswell, E5-26XX
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* Corei4: skylake
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*/
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-#define NMACH 62
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+#define NMACH 63
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static char *machnam[NMACH] =
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{"UNKNOWN", "PPCG4", "PPCG5", "POWER3", "POWER4", "POWER5",
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"POWER6", "POWER7", "POWER8", "POWERe6500",
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@@ -39,7 +39,8 @@ static char *machnam[NMACH] =
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"USI", "USII", "USIII", "USIV", "UST1", "UST2", "UnknownUS",
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"MIPSR1xK", "MIPSICE9",
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"ARMa7", "ARMa9", "ARMa15", "ARMa17",
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- "ARM64xgene1", "ARM64a53", "ARM64a57"};
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+ "ARM64xgene1", "ARM64a53", "ARM64a57",
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+ "RISCV64"};
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enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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IbmPwr6, IbmPwr7, IbmPwr8, Pwre6500,
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IbmZ9, IbmZ10, IbmZ196, IbmZ12, IbmZ13, /* s390(x) in Linux */
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@@ -58,7 +59,8 @@ enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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ARM17, /* lots of tablets */
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ARM64xg, /* includes ARMv8 */
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ARM64a53,
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- ARM64a57
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+ ARM64a57,
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+ RISCV64
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};
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#define MachIsX86(mach_) \
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( (mach_) >= x86x87 && (mach_) <= x86X )
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@@ -83,6 +85,8 @@ enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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( (mach_) >= ARM64xg && || (mach_) <= ARM64a57)
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#define MachIsS390(mach_) \
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( (mach_) >= IbmZ9 && (mach_) <= IbmZ13 )
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+#define MachIsRISCV64(mach_) \
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+ ( (mach_) == RISCV64)
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static char *f2c_namestr[5] = {"UNKNOWN","Add_", "Add__", "NoChange", "UpCase"};
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@@ -106,13 +110,13 @@ enum ISAEXT
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ISA_AVXMAC, ISA_AVXFMA4, ISA_AVX, ISA_SSE3, ISA_SSE2, ISA_SSE1, ISA_3DNow,
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ISA_NEON, ISA_NEON16, ISA_VFP3D32MAC, ISA_VFP3D16MAC};
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-#define NASMD 11
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+#define NASMD 12
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enum ASMDIA
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{ASM_None=0, gas_x86_32, gas_x86_64, gas_sparc, gas_ppc, gas_parisc,
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- gas_mips, gas_arm, gas_arm64, gas_wow64, gas_s390};
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+ gas_mips, gas_arm, gas_arm64, gas_wow64, gas_s390, gas_riscv64};
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static char *ASMNAM[NASMD] =
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{"", "GAS_x8632", "GAS_x8664", "GAS_SPARC", "GAS_PPC", "GAS_PARISC",
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- "GAS_MIPS", "GAS_ARM", "GAS_ARM64", "GAS_WOW64", "GAS_S390"};
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+ "GAS_MIPS", "GAS_ARM", "GAS_ARM64", "GAS_WOW64", "GAS_S390", "GAS_RISCV64"};
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/*
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* Used for archinfo probes (can pack in bitfield)
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diff --git a/CONFIG/src/Makefile b/CONFIG/src/Makefile
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index 212b9d7..171aa20 100644
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--- a/CONFIG/src/Makefile
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+++ b/CONFIG/src/Makefile
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@@ -323,6 +323,11 @@ IRun_GAS_PPC :
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$(MAKE) $(atlrun) atldir=$(mydir) exe=xprobe_gas_ppc args="$(args)" \
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redir=config0.out
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- cat config0.out
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+IRun_GAS_RISCV64 :
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+ $(CC) $(CCFLAGS) -o xprobe_gas_riscv64 $(SRCdir)/backend/probe_this_asm.c $(SRCdir)/backend/probe_gas_riscv64.S
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+ $(MAKE) $(atlrun) atldir=$(mydir) exe=xprobe_gas_riscv64 args="$(args)" \
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+ redir=config0.out
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+ - cat config0.out
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IRun_GAS_x8664 :
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$(CC) $(CCFLAGS) -o xprobe_gas_x8664 $(SRCdir)/backend/probe_this_asm.c $(SRCdir)/backend/probe_gas_x8664.S
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$(MAKE) $(atlrun) atldir=$(mydir) exe=xprobe_gas_x8664 args="$(args)" \
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diff --git a/CONFIG/src/SpewMakeInc.c b/CONFIG/src/SpewMakeInc.c
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index 097d7b9..9206363 100644
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--- a/CONFIG/src/SpewMakeInc.c
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+++ b/CONFIG/src/SpewMakeInc.c
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@@ -401,6 +401,8 @@ char *GetPtrbitsFlag(enum OSTYPE OS, enum MACHTYPE arch, int ptrbits,
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if (MachIsIA64(arch))
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return(sp);
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+ if (MachIsRISCV64(arch))
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+ return(sp);
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if (MachIsMIPS(arch))
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return((ptrbits == 64) ? "-mabi=64" : "-mabi=n32");
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if (MachIsS390(arch))
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diff --git a/CONFIG/src/atlcomp.txt b/CONFIG/src/atlcomp.txt
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index aa31604..e8ed3ca 100644
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--- a/CONFIG/src/atlcomp.txt
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+++ b/CONFIG/src/atlcomp.txt
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@@ -328,6 +328,21 @@ MACH=ARM64a53 OS=ALL LVL=1000 COMPS=dmc
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MACH=ARM64a53 OS=ALL LVL=1000 COMPS=f77
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'gfortran' '-O2 -mcpu=cortex-a53'
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#
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+# RISCV64 defaults (untested)
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+#
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+MACH=RISCV64 OS=ALL LVL=1000 COMPS=f77
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+ 'gfortran' '-O2'
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+MACH=RISCV64 OS=ALL LVL=1000 COMPS=xcc
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+ 'gcc' '-O2'
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+MACH=RISCV64 OS=ALL LVL=1000 COMPS=icc
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+ 'gcc' '-O2'
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+MACH=RISCV64 OS=ALL LVL=1000 COMPS=skc,gcc,dkc
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+ 'gcc' '-O3'
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+MACH=RISCV64 OS=ALL LVL=1100 COMPS=dmc,smc
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+ 'gcc' '-O1'
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+MACH=RISCV64 OS=ALL LVL=1000 COMPS=f77
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+ 'gfortran' '-O2'
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+#
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# Generic defaults
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#
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MACH=ALL OS=ALL LVL=4 COMPS=smc,dmc,skc,dkc,icc,gcc,xcc
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diff --git a/CONFIG/src/atlconf_misc.c b/CONFIG/src/atlconf_misc.c
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index 63cb1ef..fa91026 100644
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--- a/CONFIG/src/atlconf_misc.c
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+++ b/CONFIG/src/atlconf_misc.c
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@@ -573,6 +573,7 @@ enum ARCHFAM ProbeArchFam(char *targ)
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else if (strstr(res, "mips")) fam = AFMIPS;
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else if (strstr(res, "arm")) fam = AFARM;
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else if (strstr(res, "aarch64")) fam = AFARM;
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+ else if (strstr(res, "riscv64")) fam = AFRISCV64;
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else if (strstr(res, "s390")) fam = AFS390;
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else if ( strstr(res, "i686") || strstr(res, "i586") ||
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strstr(res, "i486") || strstr(res, "i386") ||
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@@ -599,6 +600,7 @@ enum ARCHFAM ProbeArchFam(char *targ)
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else if (strstr(res, "mips")) fam = AFMIPS;
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else if (strstr(res, "arm")) fam = AFARM;
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else if (strstr(res, "aarch64")) fam = AFARM;
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+ else if (strstr(res, "riscv64")) fam = AFRISCV64;
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else if (strstr(res, "s390")) fam = AFS390;
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free(res);
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}
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diff --git a/CONFIG/src/backend/Make.ext b/CONFIG/src/backend/Make.ext
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index 4743353..572e286 100644
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--- a/CONFIG/src/backend/Make.ext
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+++ b/CONFIG/src/backend/Make.ext
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@@ -35,7 +35,7 @@ files = archinfo_aix.c archinfo_freebsd.c archinfo_irix.c archinfo_linux.c \
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probe_aff_PLPA.c probe_aff_RUNON.c probe_aff_SCHED.c \
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probe_aff_SETAFFNP.c probe_aff_SETPROCNP.c probe_aff_WIN.c \
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probe_aff_WIN64.c probe_arm32_FPABI.c probe_dAVX.c probe_dSSE3.c \
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- probe_dmac.c probe_dvec.c probe_gas_arm.S probe_gas_arm64.S \
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+ probe_dmac.c probe_dvec.c probe_gas_arm.S probe_gas_arm64.S probe_gas_riscv64.S \
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probe_gas_mips.S probe_gas_parisc.S probe_gas_ppc.S probe_gas_s390.S \
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probe_gas_sparc.S probe_gas_wow64.S probe_gas_x8632.S \
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probe_gas_x8664.S probe_smac.c probe_svec.c probe_this_asm.c \
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@@ -65,6 +65,8 @@ probe_gas_arm.S : $(basf)
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$(extC) -b $(basf) -o probe_gas_arm.S rout=probe_gas_arm.S
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probe_gas_arm64.S : $(basf)
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$(extC) -b $(basf) -o probe_gas_arm64.S rout=probe_gas_arm64.S
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+probe_gas_riscv64.S : $(basf)
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+ $(extC) -b $(basf) -o probe_gas_riscv64.S rout=probe_gas_riscv64.S
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probe_gas_s390.S : $(basf)
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$(extC) -b $(basf) -o probe_gas_s390.S rout=probe_gas_s390.S
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probe_AVXMAC.S : $(basf)
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diff --git a/CONFIG/src/backend/archinfo_linux.c b/CONFIG/src/backend/archinfo_linux.c
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index cdcee92..d37e7a8 100644
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--- a/CONFIG/src/backend/archinfo_linux.c
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+++ b/CONFIG/src/backend/archinfo_linux.c
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@@ -340,6 +340,14 @@ enum MACHTYPE ProbeArch()
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free(res);
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}
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break;
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+ case AFRISCV64:
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+ res = atlsys_1L(NULL, "fgrep 'isa' /proc/cpuinfo", 0, 0);
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+ if (res)
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+ {
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+ if (strstr(res, "rv64imafdc")) mach = RISCV64;
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+ free(res);
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+ }
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+ break;
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default:
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#if 0
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if (!CmndOneLine(NULL, "fgrep 'cpu family' /proc/cpuinfo", res))
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diff --git a/CONFIG/src/backend/probe_gas_riscv64.S b/CONFIG/src/backend/probe_gas_riscv64.S
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new file mode 100644
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index 0000000..2af81ef
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--- /dev/null
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+++ b/CONFIG/src/backend/probe_gas_riscv64.S
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@@ -0,0 +1,15 @@
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+#include "atlas_asm.h"
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+#
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+# Linux RISCV64 assembly for:
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+# int asm_probe(int i)
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+# RETURNS: i*3
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+#
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+
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+.text
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+.globl ATL_asmdecor(asm_probe)
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+.type ATL_asmdecor(asm_probe), %function
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+ATL_asmdecor(asm_probe):
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+ slliw a5,a0,0x1
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+ addw a0,a0,a5
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+ ret
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+.size ATL_asmdecor(asm_probe),.-ATL_asmdecor(asm_probe)
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diff --git a/CONFIG/src/probe_comp.c b/CONFIG/src/probe_comp.c
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index 1652e24..cdf9991 100644
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--- a/CONFIG/src/probe_comp.c
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+++ b/CONFIG/src/probe_comp.c
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@@ -595,6 +595,8 @@ char *GetPtrbitsFlag(enum OSTYPE OS, enum MACHTYPE arch, int ptrbits,
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if (MachIsIA64(arch))
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return(sp);
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+ if (MachIsRISCV64(arch))
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+ return(sp);
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if (MachIsMIPS(arch))
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return((ptrbits == 64) ? "-mabi=64" : "-mabi=n32");
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if (MachIsS390(arch))
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diff --git a/include/atlas_genparse.h b/include/atlas_genparse.h
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index bc3fbf9..bb22244 100644
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--- a/include/atlas_genparse.h
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+++ b/include/atlas_genparse.h
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@@ -6,13 +6,13 @@
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#include <assert.h>
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#include <string.h>
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#include <ctype.h>
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-#define NASMD 11
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+#define NASMD 12
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enum ASMDIA
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{ASM_None=0, gas_x86_32, gas_x86_64, gas_sparc, gas_ppc, gas_parisc,
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- gas_mips, gas_arm, gas_arm64, gas_wow64, gas_s390};
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+ gas_mips, gas_arm, gas_arm64, gas_wow64, gas_s390, gas_riscv64};
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static char *ASMNAM[NASMD] =
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{"", "GAS_x8632", "GAS_x8664", "GAS_SPARC", "GAS_PPC", "GAS_PARISC",
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- "GAS_MIPS", "GAS_ARM", "GAS_ARM64", "GAS_WOW64", "GAS_S390"};
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+ "GAS_MIPS", "GAS_ARM", "GAS_ARM64", "GAS_WOW64", "GAS_S390", "GAS_RISCV64"};
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/*
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* Basic data structure for forming queues with some minimal info
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*/
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18
atlas.spec
18
atlas.spec
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@ -5,7 +5,7 @@ Version: 3.10.3
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%if "%{?enable_native_atlas}" != "0"
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%define dist .native
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%endif
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Release: 5%{?dist}
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Release: 5.0.riscv64%{?dist}
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Summary: Automatically Tuned Linear Algebra Software
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Group: System Environment/Libraries
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# Unbundle LAPACK (BZ #1181369)
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Patch9: atlas.3.10.1-unbundle.patch
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Patch10: atlas-riscv64-port.patch
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BuildRequires: gcc-gfortran, lapack-static, gcc
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%ifarch x86_64
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@ -370,6 +372,9 @@ CPUs. The base ATLAS builds for the ppc64 architecture are made for the Power 5
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%endif
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%patch8 -p1 -b .genparse
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%patch9 -p1 -b .unbundle
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%ifarch riscv64
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%patch10 -p1 -b .riscv64
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%endif
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cp %{SOURCE1} CONFIG/ARCHS/
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#cp %{SOURCE2} CONFIG/ARCHS/
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@ -458,6 +463,11 @@ p=$(pwd)
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%define base_options "-A ARM64a53 -V 1"
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%endif
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%ifarch riscv64
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%define flags %{nil}
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%define base_options "-A RISCV64 -V 1"
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%endif
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%if "%{?enable_native_atlas}" != "0"
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%define threads_option %{nil}
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%define base_options %{nil}
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@ -497,7 +507,7 @@ for type in %{types}; do
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fi
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mkdir -p %{_arch}_${type}
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pushd %{_arch}_${type}
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../configure %{mode} $thread_options $arg_options -D c -DWALL -Fa alg '%{flags} -g -Wa,--noexecstack -fPIC ${RPM_LD_FLAGS}'\
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../configure %{mode} $thread_options $arg_options -D c -DWALL -Fa alg "%{flags} -g -Wa,--noexecstack -fPIC ${RPM_LD_FLAGS}"\
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--prefix=%{buildroot}%{_prefix} \
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--incdir=%{buildroot}%{_includedir} \
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--libdir=%{buildroot}%{_libdir}/${libname}
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%endif
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%changelog
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* Tue May 29 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 3.10.3-5.0.riscv64
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- Fix passing RPM_LD_FLAGS to linker
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- Add support for RISC-V (riscv64)
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* Wed Apr 11 2018 Jakub Martisko <jamartis@redhat.com> - 3.10.3-5
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- Pass RPM_LD_FLAGS to linker
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