add sparc patch
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6c07c07cde
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95
atlas-sparc-linux.patch
Normal file
95
atlas-sparc-linux.patch
Normal file
@ -0,0 +1,95 @@
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diff -uNr ATLAS.orig/CONFIG/src/backend/archinfo_linux.c ATLAS/CONFIG/src/backend/archinfo_linux.c
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--- ATLAS.orig/CONFIG/src/backend/archinfo_linux.c 2010-02-01 23:28:58.000000000 +0000
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+++ ATLAS/CONFIG/src/backend/archinfo_linux.c 2010-02-02 22:38:31.000000000 +0000
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@@ -145,14 +145,12 @@
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* Add these back if we get machine access and can test
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*/
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case AFSPARC: /* don't know here anymore */
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- #if 0
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if ( !CmndOneLine(NULL, "fgrep cpu /proc/cpuinfo", res) )
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{
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- if (strstr(res, "UltraSparc II")) mach = SunUS2;
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- else if (strstr(res, "UltraSparc I")) mach = SunUS1;
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- else if (strstr(res, "UltraSparc")) mach = SunUSX;
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+ if (strstr(res, "UltraSparc II")) mach = SunUSII;
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+ else if (strstr(res, "UltraSparc I")) mach = SunUSI;
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+ else if (strstr(res, "UltraSparc")) mach = SunUSII;
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}
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- #endif
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break;
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case AFALPHA:
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#if 0
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@@ -196,6 +194,11 @@
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reslns = CmndResults(NULL, "grep '^processor' /proc/cpuinfo");
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if (reslns) ncpu = fNumLines(reslns);
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}
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+ if (__sparc__)
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+ {
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+ reslns = CmndResults(NULL, "grep '^CPU.*online' /proc/cpuinfo");
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+ if (reslns) ncpu = fNumLines(reslns);
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+ }
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return(ncpu);
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}
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diff -uNr ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x2_US.c ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2_US.c
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--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x2_US.c 2010-02-01 23:29:23.000000000 +0000
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+++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2_US.c 2010-02-01 23:30:07.000000000 +0000
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@@ -95,6 +95,11 @@
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#define incBm %g3
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#define incBn %g4
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+#if defined(__sparc__) && defined(__arch64__)
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+ .register %g2, #scratch
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+ .register %g3, #scratch
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+#endif
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+
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#ifdef DCPLX
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#define incCm 64
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#define CSH 4
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diff -uNr ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x8_US.c ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x8_US.c
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--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x8_US.c 2010-02-01 23:29:24.000000000 +0000
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+++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x8_US.c 2010-02-01 23:30:08.000000000 +0000
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@@ -135,6 +135,11 @@
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#define pfB %i2 /* aliased with ldab */
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#endif
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+#if defined(__sparc__) && defined(__arch64__)
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+ .register %g2, #scratch
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+ .register %g3, #scratch
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+#endif
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+
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#ifdef DCPLX
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#define CMUL(arg_) ((arg_)*2)
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#define incCm 64
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diff -uNr ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x2_US.c ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x2_US.c
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--- ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x2_US.c 2010-02-01 23:29:25.000000000 +0000
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+++ ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x2_US.c 2010-02-01 23:30:09.000000000 +0000
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@@ -93,6 +93,12 @@
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#define rC23 %f30
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#define rC33 %f31
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#define FSIZE 64
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+
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+#if defined(__sparc__) && defined(__arch64__)
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+ .register %g2, #scratch
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+ .register %g3, #scratch
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+#endif
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+
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#ifdef SCPLX
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#define CSH 3
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#define CMUL(arg_) ((arg_)*2)
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diff -uNr ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x72_US.c ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x72_US.c
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--- ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x72_US.c 2010-02-01 23:29:25.000000000 +0000
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+++ ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x72_US.c 2010-02-01 23:30:09.000000000 +0000
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@@ -108,6 +108,12 @@
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#define rC23 %f30
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#define rC33 %f31
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#define FSIZE 64
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+
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+#if defined(__sparc__) && defined(__arch64__)
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+ .register %g2, #scratch
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+ .register %g3, #scratch
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+#endif
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+
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#ifdef SCPLX
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#define CSH 3
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#define CMUL(arg_) ((arg_)*2)
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