4ee06b7e67
Remove stale ide.h "configuration options": * INITIAL_MULT_COUNT - always defined to 0 * SUPPORT_SLOW_DATA_PORTS - unused * OK_TO_RESET_CONTROLLER - always defined to 1 * DISABLE_IRQ_NOSYNC - always defined to 0 Leave SUPPORT_VLB_SYNC (defined to 0 for CRIS and FRV, otherwise to 1) for now but disallow overriding it by <asm/ide.h>. There should be no functionality changes caused by this patch. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
95 lines
2.4 KiB
C
95 lines
2.4 KiB
C
/*
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* linux/include/asm-cris/ide.h
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*
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* Copyright (C) 2000, 2001, 2002 Axis Communications AB
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*
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* Authors: Bjorn Wesen
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*
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*/
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/*
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* This file contains the ETRAX 100LX specific IDE code.
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*/
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#ifndef __ASMCRIS_IDE_H
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#define __ASMCRIS_IDE_H
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#ifdef __KERNEL__
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#include <asm/arch/svinto.h>
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#include <asm/io.h>
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#include <asm-generic/ide_iops.h>
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/* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */
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#define MAX_HWIFS 4
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static inline int ide_default_irq(unsigned long base)
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{
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/* all IDE busses share the same IRQ, number 4.
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* this has the side-effect that ide-probe.c will cluster our 4 interfaces
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* together in a hwgroup, and will serialize accesses. this is good, because
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* we can't access more than one interface at the same time on ETRAX100.
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*/
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return 4;
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}
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static inline unsigned long ide_default_io_base(int index)
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{
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/* we have no real I/O base address per interface, since all go through the
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* same register. but in a bitfield in that register, we have the i/f number.
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* so we can use the io_base to remember that bitfield.
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*/
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static const unsigned long io_bases[MAX_HWIFS] = {
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IO_FIELD(R_ATA_CTRL_DATA, sel, 0),
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IO_FIELD(R_ATA_CTRL_DATA, sel, 1),
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IO_FIELD(R_ATA_CTRL_DATA, sel, 2),
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IO_FIELD(R_ATA_CTRL_DATA, sel, 3)
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};
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return io_bases[index];
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}
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/* this is called once for each interface, to setup the port addresses. data_port is the result
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* of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us.
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*/
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static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
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{
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int i;
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/* fill in ports for ATA addresses 0 to 7 */
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for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
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hw->io_ports[i] = data_port |
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IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
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IO_STATE(R_ATA_CTRL_DATA, cs0, active);
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}
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/* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
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hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
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IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
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IO_STATE(R_ATA_CTRL_DATA, cs1, active);
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/* whats this for ? */
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hw->io_ports[IDE_IRQ_OFFSET] = 0;
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}
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static inline void ide_init_default_hwifs(void)
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{
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hw_regs_t hw;
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int index;
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for(index = 0; index < MAX_HWIFS; index++) {
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ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
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hw.irq = ide_default_irq(ide_default_io_base(index));
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ide_register_hw(&hw, NULL);
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}
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}
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#endif /* __KERNEL__ */
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#endif /* __ASMCRIS_IDE_H */
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