fed42c198b
This is the PCI part of the DesignWare DMAC driver. The controller is usually used in the Intel hardware such as Intel Medfield. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
37 lines
1.0 KiB
Plaintext
37 lines
1.0 KiB
Plaintext
#
|
|
# DMA engine configuration for dw
|
|
#
|
|
|
|
config DW_DMAC_CORE
|
|
tristate "Synopsys DesignWare AHB DMA support"
|
|
depends on GENERIC_HARDIRQS
|
|
select DMA_ENGINE
|
|
|
|
config DW_DMAC
|
|
tristate "Synopsys DesignWare AHB DMA platform driver"
|
|
select DW_DMAC_CORE
|
|
default y if CPU_AT32AP7000
|
|
help
|
|
Support the Synopsys DesignWare AHB DMA controller. This
|
|
can be integrated in chips such as the Atmel AT32ap7000.
|
|
|
|
config DW_DMAC_PCI
|
|
tristate "Synopsys DesignWare AHB DMA PCI driver"
|
|
depends on PCI
|
|
select DW_DMAC_CORE
|
|
help
|
|
Support the Synopsys DesignWare AHB DMA controller on the
|
|
platfroms that enumerate it as a PCI device. For example,
|
|
Intel Medfield has integrated this GPDMA controller.
|
|
|
|
config DW_DMAC_BIG_ENDIAN_IO
|
|
bool "Use big endian I/O register access"
|
|
default y if AVR32
|
|
depends on DW_DMAC_CORE
|
|
help
|
|
Say yes here to use big endian I/O access when reading and writing
|
|
to the DMA controller registers. This is needed on some platforms,
|
|
like the Atmel AVR32 architecture.
|
|
|
|
If unsure, use the default setting.
|