fe14ed43ee
Add missing __iomem to struct cryp_register pointers, this solve some "incorrect type in initializer (different address spaces)" sparse warnings. Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
388 lines
12 KiB
C
388 lines
12 KiB
C
/**
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* Copyright (C) ST-Ericsson SA 2010
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* Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
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* Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
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* Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
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* Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
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* Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include "cryp_p.h"
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#include "cryp.h"
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/**
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* cryp_wait_until_done - wait until the device logic is not busy
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*/
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void cryp_wait_until_done(struct cryp_device_data *device_data)
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{
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while (cryp_is_logic_busy(device_data))
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cpu_relax();
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}
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/**
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* cryp_check - This routine checks Peripheral and PCell Id
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* @device_data: Pointer to the device data struct for base address.
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*/
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int cryp_check(struct cryp_device_data *device_data)
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{
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int peripheralid2 = 0;
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if (NULL == device_data)
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return -EINVAL;
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peripheralid2 = readl_relaxed(&device_data->base->periphId2);
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if (peripheralid2 != CRYP_PERIPHERAL_ID2_DB8500)
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return -EPERM;
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/* Check Peripheral and Pcell Id Register for CRYP */
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if ((CRYP_PERIPHERAL_ID0 ==
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readl_relaxed(&device_data->base->periphId0))
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&& (CRYP_PERIPHERAL_ID1 ==
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readl_relaxed(&device_data->base->periphId1))
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&& (CRYP_PERIPHERAL_ID3 ==
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readl_relaxed(&device_data->base->periphId3))
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&& (CRYP_PCELL_ID0 ==
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readl_relaxed(&device_data->base->pcellId0))
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&& (CRYP_PCELL_ID1 ==
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readl_relaxed(&device_data->base->pcellId1))
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&& (CRYP_PCELL_ID2 ==
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readl_relaxed(&device_data->base->pcellId2))
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&& (CRYP_PCELL_ID3 ==
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readl_relaxed(&device_data->base->pcellId3))) {
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return 0;
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}
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return -EPERM;
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}
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/**
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* cryp_activity - This routine enables/disable the cryptography function.
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* @device_data: Pointer to the device data struct for base address.
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* @cryp_crypen: Enable/Disable functionality
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*/
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void cryp_activity(struct cryp_device_data *device_data,
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enum cryp_crypen cryp_crypen)
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{
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CRYP_PUT_BITS(&device_data->base->cr,
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cryp_crypen,
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CRYP_CR_CRYPEN_POS,
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CRYP_CR_CRYPEN_MASK);
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}
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/**
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* cryp_flush_inoutfifo - Resets both the input and the output FIFOs
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* @device_data: Pointer to the device data struct for base address.
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*/
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void cryp_flush_inoutfifo(struct cryp_device_data *device_data)
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{
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/*
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* We always need to disble the hardware before trying to flush the
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* FIFO. This is something that isn't written in the design
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* specification, but we have been informed by the hardware designers
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* that this must be done.
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*/
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cryp_activity(device_data, CRYP_CRYPEN_DISABLE);
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cryp_wait_until_done(device_data);
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CRYP_SET_BITS(&device_data->base->cr, CRYP_CR_FFLUSH_MASK);
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/*
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* CRYP_SR_INFIFO_READY_MASK is the expected value on the status
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* register when starting a new calculation, which means Input FIFO is
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* not full and input FIFO is empty.
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*/
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while (readl_relaxed(&device_data->base->sr) !=
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CRYP_SR_INFIFO_READY_MASK)
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cpu_relax();
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}
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/**
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* cryp_set_configuration - This routine set the cr CRYP IP
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* @device_data: Pointer to the device data struct for base address.
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* @cryp_config: Pointer to the configuration parameter
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* @control_register: The control register to be written later on.
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*/
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int cryp_set_configuration(struct cryp_device_data *device_data,
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struct cryp_config *cryp_config,
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u32 *control_register)
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{
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u32 cr_for_kse;
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if (NULL == device_data || NULL == cryp_config)
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return -EINVAL;
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*control_register |= (cryp_config->keysize << CRYP_CR_KEYSIZE_POS);
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/* Prepare key for decryption in AES_ECB and AES_CBC mode. */
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if ((CRYP_ALGORITHM_DECRYPT == cryp_config->algodir) &&
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((CRYP_ALGO_AES_ECB == cryp_config->algomode) ||
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(CRYP_ALGO_AES_CBC == cryp_config->algomode))) {
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cr_for_kse = *control_register;
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/*
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* This seems a bit odd, but it is indeed needed to set this to
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* encrypt even though it is a decryption that we are doing. It
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* also mentioned in the design spec that you need to do this.
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* After the keyprepartion for decrypting is done you should set
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* algodir back to decryption, which is done outside this if
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* statement.
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*
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* According to design specification we should set mode ECB
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* during key preparation even though we might be running CBC
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* when enter this function.
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*
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* Writing to KSE_ENABLED will drop CRYPEN when key preparation
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* is done. Therefore we need to set CRYPEN again outside this
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* if statement when running decryption.
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*/
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cr_for_kse |= ((CRYP_ALGORITHM_ENCRYPT << CRYP_CR_ALGODIR_POS) |
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(CRYP_ALGO_AES_ECB << CRYP_CR_ALGOMODE_POS) |
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(CRYP_CRYPEN_ENABLE << CRYP_CR_CRYPEN_POS) |
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(KSE_ENABLED << CRYP_CR_KSE_POS));
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writel_relaxed(cr_for_kse, &device_data->base->cr);
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cryp_wait_until_done(device_data);
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}
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*control_register |=
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((cryp_config->algomode << CRYP_CR_ALGOMODE_POS) |
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(cryp_config->algodir << CRYP_CR_ALGODIR_POS));
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return 0;
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}
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/**
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* cryp_configure_protection - set the protection bits in the CRYP logic.
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* @device_data: Pointer to the device data struct for base address.
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* @p_protect_config: Pointer to the protection mode and
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* secure mode configuration
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*/
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int cryp_configure_protection(struct cryp_device_data *device_data,
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struct cryp_protection_config *p_protect_config)
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{
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if (NULL == p_protect_config)
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return -EINVAL;
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CRYP_WRITE_BIT(&device_data->base->cr,
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(u32) p_protect_config->secure_access,
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CRYP_CR_SECURE_MASK);
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CRYP_PUT_BITS(&device_data->base->cr,
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p_protect_config->privilege_access,
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CRYP_CR_PRLG_POS,
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CRYP_CR_PRLG_MASK);
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return 0;
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}
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/**
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* cryp_is_logic_busy - returns the busy status of the CRYP logic
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* @device_data: Pointer to the device data struct for base address.
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*/
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int cryp_is_logic_busy(struct cryp_device_data *device_data)
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{
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return CRYP_TEST_BITS(&device_data->base->sr,
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CRYP_SR_BUSY_MASK);
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}
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/**
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* cryp_configure_for_dma - configures the CRYP IP for DMA operation
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* @device_data: Pointer to the device data struct for base address.
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* @dma_req: Specifies the DMA request type value.
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*/
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void cryp_configure_for_dma(struct cryp_device_data *device_data,
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enum cryp_dma_req_type dma_req)
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{
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CRYP_SET_BITS(&device_data->base->dmacr,
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(u32) dma_req);
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}
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/**
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* cryp_configure_key_values - configures the key values for CRYP operations
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* @device_data: Pointer to the device data struct for base address.
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* @key_reg_index: Key value index register
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* @key_value: The key value struct
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*/
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int cryp_configure_key_values(struct cryp_device_data *device_data,
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enum cryp_key_reg_index key_reg_index,
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struct cryp_key_value key_value)
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{
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while (cryp_is_logic_busy(device_data))
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cpu_relax();
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switch (key_reg_index) {
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case CRYP_KEY_REG_1:
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writel_relaxed(key_value.key_value_left,
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&device_data->base->key_1_l);
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writel_relaxed(key_value.key_value_right,
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&device_data->base->key_1_r);
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break;
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case CRYP_KEY_REG_2:
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writel_relaxed(key_value.key_value_left,
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&device_data->base->key_2_l);
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writel_relaxed(key_value.key_value_right,
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&device_data->base->key_2_r);
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break;
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case CRYP_KEY_REG_3:
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writel_relaxed(key_value.key_value_left,
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&device_data->base->key_3_l);
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writel_relaxed(key_value.key_value_right,
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&device_data->base->key_3_r);
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break;
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case CRYP_KEY_REG_4:
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writel_relaxed(key_value.key_value_left,
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&device_data->base->key_4_l);
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writel_relaxed(key_value.key_value_right,
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&device_data->base->key_4_r);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/**
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* cryp_configure_init_vector - configures the initialization vector register
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* @device_data: Pointer to the device data struct for base address.
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* @init_vector_index: Specifies the index of the init vector.
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* @init_vector_value: Specifies the value for the init vector.
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*/
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int cryp_configure_init_vector(struct cryp_device_data *device_data,
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enum cryp_init_vector_index
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init_vector_index,
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struct cryp_init_vector_value
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init_vector_value)
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{
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while (cryp_is_logic_busy(device_data))
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cpu_relax();
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switch (init_vector_index) {
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case CRYP_INIT_VECTOR_INDEX_0:
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writel_relaxed(init_vector_value.init_value_left,
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&device_data->base->init_vect_0_l);
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writel_relaxed(init_vector_value.init_value_right,
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&device_data->base->init_vect_0_r);
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break;
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case CRYP_INIT_VECTOR_INDEX_1:
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writel_relaxed(init_vector_value.init_value_left,
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&device_data->base->init_vect_1_l);
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writel_relaxed(init_vector_value.init_value_right,
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&device_data->base->init_vect_1_r);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/**
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* cryp_save_device_context - Store hardware registers and
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* other device context parameter
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* @device_data: Pointer to the device data struct for base address.
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* @ctx: Crypto device context
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*/
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void cryp_save_device_context(struct cryp_device_data *device_data,
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struct cryp_device_context *ctx,
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int cryp_mode)
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{
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enum cryp_algo_mode algomode;
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struct cryp_register __iomem *src_reg = device_data->base;
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struct cryp_config *config =
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(struct cryp_config *)device_data->current_ctx;
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/*
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* Always start by disable the hardware and wait for it to finish the
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* ongoing calculations before trying to reprogram it.
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*/
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cryp_activity(device_data, CRYP_CRYPEN_DISABLE);
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cryp_wait_until_done(device_data);
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if (cryp_mode == CRYP_MODE_DMA)
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cryp_configure_for_dma(device_data, CRYP_DMA_DISABLE_BOTH);
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if (CRYP_TEST_BITS(&src_reg->sr, CRYP_SR_IFEM_MASK) == 0)
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ctx->din = readl_relaxed(&src_reg->din);
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ctx->cr = readl_relaxed(&src_reg->cr) & CRYP_CR_CONTEXT_SAVE_MASK;
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switch (config->keysize) {
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case CRYP_KEY_SIZE_256:
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ctx->key_4_l = readl_relaxed(&src_reg->key_4_l);
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ctx->key_4_r = readl_relaxed(&src_reg->key_4_r);
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case CRYP_KEY_SIZE_192:
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ctx->key_3_l = readl_relaxed(&src_reg->key_3_l);
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ctx->key_3_r = readl_relaxed(&src_reg->key_3_r);
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case CRYP_KEY_SIZE_128:
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ctx->key_2_l = readl_relaxed(&src_reg->key_2_l);
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ctx->key_2_r = readl_relaxed(&src_reg->key_2_r);
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default:
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ctx->key_1_l = readl_relaxed(&src_reg->key_1_l);
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ctx->key_1_r = readl_relaxed(&src_reg->key_1_r);
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}
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/* Save IV for CBC mode for both AES and DES. */
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algomode = ((ctx->cr & CRYP_CR_ALGOMODE_MASK) >> CRYP_CR_ALGOMODE_POS);
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if (algomode == CRYP_ALGO_TDES_CBC ||
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algomode == CRYP_ALGO_DES_CBC ||
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algomode == CRYP_ALGO_AES_CBC) {
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ctx->init_vect_0_l = readl_relaxed(&src_reg->init_vect_0_l);
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ctx->init_vect_0_r = readl_relaxed(&src_reg->init_vect_0_r);
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ctx->init_vect_1_l = readl_relaxed(&src_reg->init_vect_1_l);
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ctx->init_vect_1_r = readl_relaxed(&src_reg->init_vect_1_r);
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}
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}
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/**
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* cryp_restore_device_context - Restore hardware registers and
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* other device context parameter
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* @device_data: Pointer to the device data struct for base address.
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* @ctx: Crypto device context
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*/
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void cryp_restore_device_context(struct cryp_device_data *device_data,
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struct cryp_device_context *ctx)
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{
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struct cryp_register __iomem *reg = device_data->base;
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struct cryp_config *config =
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(struct cryp_config *)device_data->current_ctx;
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/*
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* Fall through for all items in switch statement. DES is captured in
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* the default.
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*/
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switch (config->keysize) {
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case CRYP_KEY_SIZE_256:
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writel_relaxed(ctx->key_4_l, ®->key_4_l);
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writel_relaxed(ctx->key_4_r, ®->key_4_r);
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case CRYP_KEY_SIZE_192:
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writel_relaxed(ctx->key_3_l, ®->key_3_l);
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writel_relaxed(ctx->key_3_r, ®->key_3_r);
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case CRYP_KEY_SIZE_128:
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writel_relaxed(ctx->key_2_l, ®->key_2_l);
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writel_relaxed(ctx->key_2_r, ®->key_2_r);
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default:
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writel_relaxed(ctx->key_1_l, ®->key_1_l);
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writel_relaxed(ctx->key_1_r, ®->key_1_r);
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}
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/* Restore IV for CBC mode for AES and DES. */
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if (config->algomode == CRYP_ALGO_TDES_CBC ||
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config->algomode == CRYP_ALGO_DES_CBC ||
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config->algomode == CRYP_ALGO_AES_CBC) {
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writel_relaxed(ctx->init_vect_0_l, ®->init_vect_0_l);
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writel_relaxed(ctx->init_vect_0_r, ®->init_vect_0_r);
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writel_relaxed(ctx->init_vect_1_l, ®->init_vect_1_l);
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writel_relaxed(ctx->init_vect_1_r, ®->init_vect_1_r);
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}
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}
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