e2fee5723b
The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not identical with it. To avoid influencing the original bonito64 support and make the loongson support more maintainable, it's better to separate the Bonito64 code from the Loongson code. This also prepares the kernel for the coming Loongson 2f machines family support. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Zhang Le <r0bertz@gentoo.org> Cc: zhangfx@lemote.com, Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
74 lines
1.7 KiB
C
74 lines
1.7 KiB
C
/*
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* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <loongson.h>
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/*
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* the first level int-handler will jump here if it is a bonito irq
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*/
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void bonito_irqdispatch(void)
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{
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u32 int_status;
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int i;
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/* workaround the IO dma problem: let cpu looping to allow DMA finish */
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int_status = LOONGSON_INTISR;
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if (int_status & (1 << 10)) {
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while (int_status & (1 << 10)) {
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udelay(1);
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int_status = LOONGSON_INTISR;
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}
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}
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/* Get pending sources, masked by current enables */
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int_status = LOONGSON_INTISR & LOONGSON_INTEN;
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if (int_status != 0) {
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i = __ffs(int_status);
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int_status &= ~(1 << i);
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do_IRQ(LOONGSON_IRQ_BASE + i);
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}
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}
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending;
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pending = read_c0_cause() & read_c0_status() & ST0_IM;
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/* machine-specific plat_irq_dispatch */
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mach_irq_dispatch(pending);
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}
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void __init arch_init_irq(void)
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{
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/*
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* Clear all of the interrupts while we change the able around a bit.
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* int-handler is not on bootstrap
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*/
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clear_c0_status(ST0_IM | ST0_BEV);
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/* setting irq trigger mode */
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set_irq_trigger_mode();
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/* no steer */
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LOONGSON_INTSTEER = 0;
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/*
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* Mask out all interrupt by writing "1" to all bit position in
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* the interrupt reset reg.
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*/
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LOONGSON_INTENCLR = ~0;
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/* machine specific irq init */
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mach_init_irq();
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}
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