3a93261f70
The Freescale ePAPR reference hypervisor provides interrupt controller
services via a hypercall interface, instead of emulating the MPIC
controller. This is called the VMPIC.
The ePAPR "virtual interrupt controller" provides interrupt controller
services for external interrupts. External interrupts received by a
partition can come from two sources:
- Hardware interrupts - hardware interrupts come from external
interrupt lines or on-chip I/O devices.
- Virtual interrupts - virtual interrupts are generated by the hypervisor
as part of some hypervisor service or hypervisor-created virtual device.
Both types of interrupts are processed using the same programming model and
same set of hypercalls.
Signed-off-by: Ashish Kalra <ashish.kalra@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
68 lines
2.2 KiB
Makefile
68 lines
2.2 KiB
Makefile
subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
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mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
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obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
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obj-$(CONFIG_PPC_EPAPR_HV_PIC) += ehv_pic.o
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fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
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obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o
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obj-$(CONFIG_PPC_MPC106) += grackle.o
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obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
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obj-$(CONFIG_PPC_PMI) += pmi.o
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obj-$(CONFIG_U3_DART) += dart_iommu.o
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obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
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obj-$(CONFIG_FSL_SOC) += fsl_soc.o
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obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
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obj-$(CONFIG_FSL_PMC) += fsl_pmc.o
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obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
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obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
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obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
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obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
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obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
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obj-$(CONFIG_FSL_RIO) += fsl_rio.o
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obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
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obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
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obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
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mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
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obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
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mv64x60_udbg.o
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obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o
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obj-$(CONFIG_AXON_RAM) += axonram.o
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obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
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obj-$(CONFIG_PPC_I8259) += i8259.o
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obj-$(CONFIG_IPIC) += ipic.o
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obj-$(CONFIG_4xx) += uic.o
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obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o
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obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
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obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o
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obj-$(CONFIG_OF_RTC) += of_rtc.o
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ifeq ($(CONFIG_PCI),y)
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obj-$(CONFIG_4xx) += ppc4xx_pci.o
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endif
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obj-$(CONFIG_PPC4xx_MSI) += ppc4xx_msi.o
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obj-$(CONFIG_PPC4xx_CPM) += ppc4xx_cpm.o
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obj-$(CONFIG_PPC4xx_GPIO) += ppc4xx_gpio.o
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obj-$(CONFIG_CPM) += cpm_common.o
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obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
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obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
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obj-$(CONFIG_PPC_DCR) += dcr.o
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obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o
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obj-$(CONFIG_UCODE_PATCH) += micropatch.o
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obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o
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obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o
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ifeq ($(CONFIG_SUSPEND),y)
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obj-$(CONFIG_6xx) += 6xx-suspend.o
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endif
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obj-$(CONFIG_PPC_SCOM) += scom.o
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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obj-$(CONFIG_PPC_XICS) += xics/
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