794d15b25d
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
48 lines
885 B
C
48 lines
885 B
C
/*
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* include/asm-arm/arch-mv78xx0/uncompress.h
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/serial_reg.h>
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#include <asm/arch/mv78xx0.h>
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#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)
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static void putc(const char c)
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{
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unsigned char *base = SERIAL_BASE;
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int i;
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for (i = 0; i < 0x1000; i++) {
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if (base[UART_LSR << 2] & UART_LSR_THRE)
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break;
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barrier();
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}
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base[UART_TX << 2] = c;
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}
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static void flush(void)
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{
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unsigned char *base = SERIAL_BASE;
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unsigned char mask;
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int i;
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mask = UART_LSR_TEMT | UART_LSR_THRE;
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for (i = 0; i < 0x1000; i++) {
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if ((base[UART_LSR << 2] & mask) == mask)
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break;
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barrier();
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}
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}
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/*
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* nothing to do
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*/
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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