1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
/*
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* arch/arm/mach-iop3xx/iq80321-pci.c
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*
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* PCI support for the Intel IQ80321 reference board
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*
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* Author: Rory Bolt <rorybolt@pacbell.net>
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* Copyright (C) 2002 Rory Bolt
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* Copyright (C) 2004 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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/*
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* The following macro is used to lookup irqs in a standard table
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* format for those systems that do not already have PCI
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* interrupts properly routed. We assume 1 <= pin <= 4
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*/
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#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
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({ int _ctl_ = -1; \
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unsigned int _idsel = idsel - minid; \
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if (_idsel <= maxid) \
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_ctl_ = pci_irq_table[_idsel][pin-1]; \
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_ctl_; })
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#define INTA IRQ_IQ31244_INTA
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#define INTB IRQ_IQ31244_INTB
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#define INTC IRQ_IQ31244_INTC
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#define INTD IRQ_IQ31244_INTD
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#define INTE IRQ_IQ31244_I82546
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static inline int __init
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iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
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{
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static int pci_irq_table[][4] = {
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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#ifdef CONFIG_ARCH_EP80219
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{INTB, INTB, INTB, INTB}, /* CFlash */
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{INTE, INTE, INTE, INTE}, /* 82551 Pro 100 */
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{INTD, INTD, INTD, INTD}, /* PCI-X Slot */
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{INTC, INTC, INTC, INTC}, /* SATA */
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#else
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{INTB, INTB, INTB, INTB}, /* CFlash */
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{INTC, INTC, INTC, INTC}, /* SATA */
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{INTD, INTD, INTD, INTD}, /* PCI-X Slot */
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{INTE, INTE, INTE, INTE}, /* 82546 GigE */
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#endif // CONFIG_ARCH_EP80219
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};
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BUG_ON(pin < 1 || pin > 4);
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return PCI_IRQ_TABLE_LOOKUP(0, 7);
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}
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static int iq31244_setup(int nr, struct pci_sys_data *sys)
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{
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struct resource *res;
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if(nr != 0)
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return 0;
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res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
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if (!res)
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panic("PCI: unable to alloc resources");
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memset(res, 0, sizeof(struct resource) * 2);
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res[0].start = IOP321_PCI_LOWER_IO_VA;
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res[0].end = IOP321_PCI_UPPER_IO_VA;
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res[0].name = "IQ31244 PCI I/O Space";
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res[0].flags = IORESOURCE_IO;
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res[1].start = IOP321_PCI_LOWER_MEM_PA;
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res[1].end = IOP321_PCI_UPPER_MEM_PA;
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res[1].name = "IQ31244 PCI Memory Space";
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res[1].flags = IORESOURCE_MEM;
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request_resource(&ioport_resource, &res[0]);
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request_resource(&iomem_resource, &res[1]);
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sys->mem_offset = IOP321_PCI_MEM_OFFSET;
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sys->io_offset = IOP321_PCI_IO_OFFSET;
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sys->resource[0] = &res[0];
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sys->resource[1] = &res[1];
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sys->resource[2] = NULL;
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return 1;
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}
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static void iq31244_preinit(void)
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{
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iop321_init();
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}
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static struct hw_pci iq31244_pci __initdata = {
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.swizzle = pci_std_swizzle,
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.nr_controllers = 1,
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.setup = iq31244_setup,
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.scan = iop321_scan_bus,
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.preinit = iq31244_preinit,
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.map_irq = iq31244_map_irq
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};
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static int __init iq31244_pci_init(void)
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{
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if (machine_is_iq31244())
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pci_common_init(&iq31244_pci);
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return 0;
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}
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subsys_initcall(iq31244_pci_init);
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