Andrew Isaacson a4b5bd9abc SB1 cache exception handling. ... Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and SB1_CEX_STALL, allowing configurable behavior on cache errors. Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2005-10-29 19:32:48 +01:00
..
c-r3k.c
c-r4k.c	Rename page argument of flush_cache_page to something more descriptive.	2005-10-29 19:32:42 +01:00
c-sb1.c	Don't copy SB1 cache error handler to uncached memory.	2005-10-29 19:32:34 +01:00
c-tx39.c
cache.c	Fix zero length sys_cacheflush	2005-10-29 19:32:44 +01:00
cerr-sb1.c	SB1 cache exception handling.	2005-10-29 19:32:48 +01:00
cex-gen.S
cex-sb1.S	SB1 cache exception handling.	2005-10-29 19:32:48 +01:00
dma-coherent.c
dma-ip27.c
dma-ip32.c
dma-noncoherent.c
extable.c
fault.c
highmem.c
init.c	Fix wrong comment.	2005-10-29 19:32:38 +01:00
ioremap.c
Makefile	Fixup a few lose ends in explicit support for MIPS R1/R2.	2005-10-29 19:32:37 +01:00
pg-r4k.c
pg-sb1.c
pgtable-32.c
pgtable-64.c
pgtable.c
sc-ip22.c
sc-r5k.c
sc-rm7k.c
tlb-andes.c
tlb-r3k.c
tlb-r4k.c
tlb-r8k.c
tlbex-fault.S
tlbex.c	Add support for SB1A CPU.	2005-10-29 19:32:46 +01:00