c5e22feffd
Both ACPI and DT provide the ability to describe additional layers of
topology between that of individual cores and higher level constructs
such as the level at which the last level cache is shared.
In ACPI this can be represented in PPTT as a Processor Hierarchy
Node Structure [1] that is the parent of the CPU cores and in turn
has a parent Processor Hierarchy Nodes Structure representing
a higher level of topology.
For example Kunpeng 920 has 6 or 8 clusters in each NUMA node, and each
cluster has 4 cpus. All clusters share L3 cache data, but each cluster
has local L3 tag. On the other hand, each clusters will share some
internal system bus.
+-----------------------------------+ +---------+
| +------+ +------+ +--------------------------+ |
| | CPU0 | | cpu1 | | +-----------+ | |
| +------+ +------+ | | | | |
| +----+ L3 | | |
| +------+ +------+ cluster | | tag | | |
| | CPU2 | | CPU3 | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +----+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | L3 |
| data |
+-----------------------------------+ | |
| +------+ +------+ | +-----------+ | |
| | | | | | | | | |
| +------+ +------+ +----+ L3 | | |
| | | tag | | |
| +------+ +------+ | | | | |
| | | | | | +-----------+ | |
| +------+ +------+ +--------------------------+ |
+-----------------------------------| | |
+-----------------------------------| | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| +----+ L3 | | |
| +------+ +------+ | | tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +---+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +--+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | +---------+
+-----------------------------------+
That means spreading tasks among clusters will bring more bandwidth
while packing tasks within one cluster will lead to smaller cache
synchronization latency. So both kernel and userspace will have
a chance to leverage this topology to deploy tasks accordingly to
achieve either smaller cache latency within one cluster or an even
distribution of load among clusters for higher throughput.
This patch exposes cluster topology to both kernel and userspace.
Libraried like hwloc will know cluster by cluster_cpus and related
sysfs attributes. PoC of HWLOC support at [2].
Note this patch only handle the ACPI case.
Special consideration is needed for SMT processors, where it is
necessary to move 2 levels up the hierarchy from the leaf nodes
(thus skipping the processor core level).
Note that arm64 / ACPI does not provide any means of identifying
a die level in the topology but that may be unrelate to the cluster
level.
[1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node
structure (Type 0)
[2] https://github.com/hisilicon/hwloc/tree/linux-cluster
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20210924085104.44806-2-21cnbao@gmail.com
124 lines
5.5 KiB
Plaintext
124 lines
5.5 KiB
Plaintext
What: /sys/devices/system/cpu/dscr_default
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Date: 13-May-2014
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KernelVersion: v3.15.0
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Contact:
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Description: Writes are equivalent to writing to
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/sys/devices/system/cpu/cpuN/dscr on all CPUs.
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Reads return the last written value or 0.
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This value is not a global default: it is a way to set
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all per-CPU defaults at the same time.
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Values: 64 bit unsigned integer (bit field)
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What: /sys/devices/system/cpu/cpu[0-9]+/dscr
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Date: 13-May-2014
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KernelVersion: v3.15.0
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Contact:
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Description: Default value for the Data Stream Control Register (DSCR) on
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a CPU.
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This default value is used when the kernel is executing and
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for any process that has not set the DSCR itself.
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If a process ever sets the DSCR (via direct access to the
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SPR) that value will be persisted for that process and used
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on any CPU where it executes (overriding the value described
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here).
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If set by a process it will be inherited by child processes.
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Values: 64 bit unsigned integer (bit field)
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What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
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Description: physical package id of cpuX. Typically corresponds to a physical
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socket number, but the actual value is architecture and platform
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dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/die_id
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Description: the CPU die ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/core_id
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Description: the CPU core ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/cluster_id
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Description: the cluster ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/book_id
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Description: the book ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent. it's only used on s390.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/drawer_id
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Description: the drawer ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent. it's only used on s390.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/core_cpus
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Description: internal kernel map of CPUs within the same core.
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(deprecated name: "thread_siblings")
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/core_cpus_list
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Description: human-readable list of CPUs within the same core.
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The format is like 0-3, 8-11, 14,17.
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(deprecated name: "thread_siblings_list").
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/package_cpus
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Description: internal kernel map of the CPUs sharing the same physical_package_id.
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(deprecated name: "core_siblings").
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/package_cpus_list
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Description: human-readable list of CPUs sharing the same physical_package_id.
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The format is like 0-3, 8-11, 14,17.
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(deprecated name: "core_siblings_list")
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/die_cpus
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Description: internal kernel map of CPUs within the same die.
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/die_cpus_list
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Description: human-readable list of CPUs within the same die.
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The format is like 0-3, 8-11, 14,17.
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus
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Description: internal kernel map of CPUs within the same cluster.
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus_list
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Description: human-readable list of CPUs within the same cluster.
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The format is like 0-3, 8-11, 14,17.
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/book_siblings
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Description: internal kernel map of cpuX's hardware threads within the same
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book_id. it's only used on s390.
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/book_siblings_list
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Description: human-readable list of cpuX's hardware threads within the same
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book_id.
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The format is like 0-3, 8-11, 14,17. it's only used on s390.
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/drawer_siblings
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Description: internal kernel map of cpuX's hardware threads within the same
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drawer_id. it's only used on s390.
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/drawer_siblings_list
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Description: human-readable list of cpuX's hardware threads within the same
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drawer_id.
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The format is like 0-3, 8-11, 14,17. it's only used on s390.
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Values: decimal list.
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