1171 lines
28 KiB
C
1171 lines
28 KiB
C
/*
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* arch/ppc/platforms/setup.c
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*
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* Copyright (C) 1995 Linus Torvalds
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* Adapted from 'alpha' version by Gary Thomas
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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*
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* Support for PReP (Motorola MTX/MVME)
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* by Troy Benjegerdes (hozer@drgw.net)
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*/
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/*
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* bootup setup stuff..
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*/
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#include <linux/config.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/major.h>
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#include <linux/interrupt.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/ioport.h>
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#include <linux/console.h>
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#include <linux/timex.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <asm/sections.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/residual.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/cache.h>
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#include <asm/dma.h>
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#include <asm/machdep.h>
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#include <asm/mc146818rtc.h>
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#include <asm/mk48t59.h>
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#include <asm/prep_nvram.h>
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#include <asm/raven.h>
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#include <asm/vga.h>
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#include <asm/time.h>
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#include <asm/mpc10x.h>
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#include <asm/i8259.h>
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#include <asm/open_pic.h>
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#include <asm/pci-bridge.h>
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#include <asm/todc.h>
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/* prep registers for L2 */
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#define CACHECRBA 0x80000823 /* Cache configuration register address */
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#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
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#define L2CACHE_512KB 0x00 /* 512KB */
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#define L2CACHE_256KB 0x01 /* 256KB */
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#define L2CACHE_1MB 0x02 /* 1MB */
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#define L2CACHE_NONE 0x03 /* NONE */
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#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
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TODC_ALLOC();
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unsigned char ucBoardRev;
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unsigned char ucBoardRevMaj, ucBoardRevMin;
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extern unsigned char prep_nvram_read_val(int addr);
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extern void prep_nvram_write_val(int addr,
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unsigned char val);
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extern unsigned char rs_nvram_read_val(int addr);
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extern void rs_nvram_write_val(int addr,
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unsigned char val);
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extern void ibm_prep_init(void);
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extern void prep_find_bridges(void);
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int _prep_type;
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extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
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extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
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extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
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extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
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extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
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#define cached_21 (((char *)(ppc_cached_irq_mask))[3])
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#define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
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#ifdef CONFIG_SOUND_CS4232
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long ppc_cs4232_dma, ppc_cs4232_dma2;
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#endif
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extern PTE *Hash, *Hash_end;
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extern unsigned long Hash_size, Hash_mask;
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extern int probingmem;
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extern unsigned long loops_per_jiffy;
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#ifdef CONFIG_SOUND_CS4232
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EXPORT_SYMBOL(ppc_cs4232_dma);
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EXPORT_SYMBOL(ppc_cs4232_dma2);
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#endif
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/* useful ISA ports */
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#define PREP_SYSCTL 0x81c
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/* present in the IBM reference design; possibly identical in Mot boxes: */
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#define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
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#define PREP_IBM_SIMM_PRESENCE 0x804
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#define PREP_IBM_EQUIPMENT 0x80c
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#define PREP_IBM_L2INFO 0x80d
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#define PREP_IBM_PM1 0x82a /* power management register 1 */
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#define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
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#define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
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/* Equipment Present Register masks: */
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#define PREP_IBM_EQUIPMENT_RESERVED 0x80
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#define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
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#define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
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#define PREP_IBM_EQUIPMENT_L2_256 0x04
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#define PREP_IBM_EQUIPMENT_CPU 0x02
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#define PREP_IBM_EQUIPMENT_L2 0x01
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/* planar ID values: */
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/* Sandalfoot/Sandalbow (6015/7020) */
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#define PREP_IBM_SANDALFOOT 0xfc
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/* Woodfield, Thinkpad 850/860 (6042/7249) */
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#define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
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/* PowerSeries 830/850 (6050/6070) */
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#define PREP_IBM_CAROLINA_IDE_0 0xf0
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#define PREP_IBM_CAROLINA_IDE_1 0xf1
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#define PREP_IBM_CAROLINA_IDE_2 0xf2
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#define PREP_IBM_CAROLINA_IDE_3 0xf3
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/* 7248-43P */
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#define PREP_IBM_CAROLINA_SCSI_0 0xf4
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#define PREP_IBM_CAROLINA_SCSI_1 0xf5
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#define PREP_IBM_CAROLINA_SCSI_2 0xf6
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#define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
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/* Tiger1 (7043-140) */
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#define PREP_IBM_TIGER1_133 0xd1
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#define PREP_IBM_TIGER1_166 0xd2
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#define PREP_IBM_TIGER1_180 0xd3
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#define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
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#define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
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/* setup_ibm_pci:
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* set Motherboard_map_name, Motherboard_map, Motherboard_routes.
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* return 8259 edge/level masks.
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*/
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void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
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extern char *Motherboard_map_name; /* for use in *_cpuinfo */
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/*
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* As found in the PReP reference implementation.
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* Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
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*/
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static void __init
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prep_gen_enable_l2(void)
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{
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outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
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}
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/* Used by Carolina and Tiger1 */
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static void __init
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prep_carolina_enable_l2(void)
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{
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outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
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}
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/* cpuinfo code common to all IBM PReP */
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static void
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prep_ibm_cpuinfo(struct seq_file *m)
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{
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unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
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seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
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seq_printf(m, "upgrade cpu\t: ");
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if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
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seq_printf(m, "not ");
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}
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seq_printf(m, "present\n");
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/* print info about the SCSI fuse */
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seq_printf(m, "scsi fuse\t: ");
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if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
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seq_printf(m, "ok");
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else
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seq_printf(m, "bad");
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seq_printf(m, "\n");
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/* print info about SIMMs */
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if (have_residual_data) {
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int i;
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seq_printf(m, "simms\t\t: ");
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for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
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if (res->Memories[i].SIMMSize != 0)
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seq_printf(m, "%d:%ldMiB ", i,
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(res->Memories[i].SIMMSize > 1024) ?
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res->Memories[i].SIMMSize>>20 :
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res->Memories[i].SIMMSize);
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}
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seq_printf(m, "\n");
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}
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}
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static int
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prep_gen_cpuinfo(struct seq_file *m)
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{
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prep_ibm_cpuinfo(m);
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return 0;
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}
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static int
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prep_sandalfoot_cpuinfo(struct seq_file *m)
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{
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unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
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prep_ibm_cpuinfo(m);
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/* report amount and type of L2 cache present */
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seq_printf(m, "L2 cache\t: ");
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if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
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seq_printf(m, "not present");
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} else {
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if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
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seq_printf(m, "256KiB");
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else
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seq_printf(m, "unknown size");
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if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
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seq_printf(m, ", copy-back");
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else
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seq_printf(m, ", write-through");
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}
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seq_printf(m, "\n");
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return 0;
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}
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static int
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prep_thinkpad_cpuinfo(struct seq_file *m)
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{
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unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
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char *cpubus_speed, *pci_speed;
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prep_ibm_cpuinfo(m);
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/* report amount and type of L2 cache present */
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seq_printf(m, "l2 cache\t: ");
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if ((equip_reg & 0x1) == 0) {
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switch ((equip_reg & 0xc) >> 2) {
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case 0x0:
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seq_printf(m, "128KiB look-aside 2-way write-through\n");
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break;
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case 0x1:
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seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
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break;
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case 0x2:
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seq_printf(m, "256KiB look-aside 2-way write-through\n");
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break;
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case 0x3:
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seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
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break;
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}
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} else {
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seq_printf(m, "not present\n");
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}
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/* report bus speeds because we can */
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if ((equip_reg & 0x80) == 0) {
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switch ((equip_reg & 0x30) >> 4) {
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case 0x1:
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cpubus_speed = "50";
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pci_speed = "25";
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break;
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case 0x3:
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cpubus_speed = "66";
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pci_speed = "33";
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break;
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default:
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cpubus_speed = "unknown";
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pci_speed = "unknown";
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break;
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}
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} else {
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switch ((equip_reg & 0x30) >> 4) {
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case 0x1:
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cpubus_speed = "25";
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pci_speed = "25";
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break;
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case 0x2:
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cpubus_speed = "60";
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pci_speed = "30";
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break;
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case 0x3:
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cpubus_speed = "33";
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pci_speed = "33";
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break;
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default:
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cpubus_speed = "unknown";
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pci_speed = "unknown";
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break;
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}
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}
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seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
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seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
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return 0;
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}
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static int
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prep_carolina_cpuinfo(struct seq_file *m)
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{
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unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
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prep_ibm_cpuinfo(m);
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/* report amount and type of L2 cache present */
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seq_printf(m, "l2 cache\t: ");
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if ((equip_reg & 0x1) == 0) {
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unsigned int l2_reg = inb(PREP_IBM_L2INFO);
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/* L2 size */
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if ((l2_reg & 0x60) == 0)
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seq_printf(m, "256KiB");
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else if ((l2_reg & 0x60) == 0x20)
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seq_printf(m, "512KiB");
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else
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seq_printf(m, "unknown size");
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/* L2 type */
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if ((l2_reg & 0x3) == 0)
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seq_printf(m, ", async");
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else if ((l2_reg & 0x3) == 1)
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seq_printf(m, ", sync");
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else
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seq_printf(m, ", unknown type");
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seq_printf(m, "\n");
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} else {
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seq_printf(m, "not present\n");
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}
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return 0;
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}
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static int
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prep_tiger1_cpuinfo(struct seq_file *m)
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{
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unsigned int l2_reg = inb(PREP_IBM_L2INFO);
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prep_ibm_cpuinfo(m);
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/* report amount and type of L2 cache present */
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seq_printf(m, "l2 cache\t: ");
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if ((l2_reg & 0xf) == 0xf) {
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seq_printf(m, "not present\n");
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} else {
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if (l2_reg & 0x8)
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seq_printf(m, "async, ");
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else
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seq_printf(m, "sync burst, ");
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if (l2_reg & 0x4)
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seq_printf(m, "parity, ");
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else
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seq_printf(m, "no parity, ");
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switch (l2_reg & 0x3) {
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case 0x0:
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seq_printf(m, "256KiB\n");
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break;
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case 0x1:
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seq_printf(m, "512KiB\n");
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break;
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case 0x2:
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seq_printf(m, "1MiB\n");
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break;
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default:
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seq_printf(m, "unknown size\n");
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break;
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}
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}
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return 0;
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}
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/* Used by all Motorola PReP */
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static int
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prep_mot_cpuinfo(struct seq_file *m)
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{
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unsigned int cachew = *((unsigned char *)CACHECRBA);
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seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
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/* report amount and type of L2 cache present */
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seq_printf(m, "l2 cache\t: ");
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switch (cachew & L2CACHE_MASK) {
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case L2CACHE_512KB:
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seq_printf(m, "512KiB");
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break;
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case L2CACHE_256KB:
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seq_printf(m, "256KiB");
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break;
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case L2CACHE_1MB:
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seq_printf(m, "1MiB");
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break;
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case L2CACHE_NONE:
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seq_printf(m, "none\n");
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goto no_l2;
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break;
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default:
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seq_printf(m, "%x\n", cachew);
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}
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seq_printf(m, ", parity %s",
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(cachew & L2CACHE_PARITY)? "enabled" : "disabled");
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seq_printf(m, " SRAM:");
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switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
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case 1: seq_printf(m, "synchronous, parity, flow-through\n");
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break;
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case 2: seq_printf(m, "asynchronous, no parity\n");
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break;
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case 3: seq_printf(m, "asynchronous, parity\n");
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break;
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default:seq_printf(m, "synchronous, pipelined, no parity\n");
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break;
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}
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no_l2:
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/* print info about SIMMs */
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if (have_residual_data) {
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int i;
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seq_printf(m, "simms\t\t: ");
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for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
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if (res->Memories[i].SIMMSize != 0)
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seq_printf(m, "%d:%ldM ", i,
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(res->Memories[i].SIMMSize > 1024) ?
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res->Memories[i].SIMMSize>>20 :
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res->Memories[i].SIMMSize);
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}
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seq_printf(m, "\n");
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}
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return 0;
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}
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static void
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prep_restart(char *cmd)
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{
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#define PREP_SP92 0x92 /* Special Port 92 */
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local_irq_disable(); /* no interrupts */
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|
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/* set exception prefix high - to the prom */
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_nmask_and_or_msr(0, MSR_IP);
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/* make sure bit 0 (reset) is a 0 */
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outb( inb(PREP_SP92) & ~1L , PREP_SP92);
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/* signal a reset to system control port A - soft reset */
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outb( inb(PREP_SP92) | 1 , PREP_SP92);
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while ( 1 ) ;
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/* not reached */
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#undef PREP_SP92
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}
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|
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static void
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prep_halt(void)
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{
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local_irq_disable(); /* no interrupts */
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|
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/* set exception prefix high - to the prom */
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_nmask_and_or_msr(0, MSR_IP);
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while ( 1 ) ;
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/* not reached */
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}
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|
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/* Carrera is the power manager in the Thinkpads. Unfortunately not much is
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* known about it, so we can't power down.
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*/
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static void
|
|
prep_carrera_poweroff(void)
|
|
{
|
|
prep_halt();
|
|
}
|
|
|
|
/*
|
|
* On most IBM PReP's, power management is handled by a Signetics 87c750
|
|
* behind the Utah component on the ISA bus. To access the 750 you must write
|
|
* a series of nibbles to port 0x82a (decoded by the Utah). This is described
|
|
* somewhat in the IBM Carolina Technical Specification.
|
|
* -Hollis
|
|
*/
|
|
static void
|
|
utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
|
|
{
|
|
/*
|
|
* byte1: 0 0 0 1 0 d a5 a4
|
|
* byte2: 0 0 0 1 a3 a2 a1 a0
|
|
*
|
|
* d = the bit's value, enabled or disabled
|
|
* (a5 a4 a3) = the byte number, minus 20
|
|
* (a2 a1 a0) = the bit number
|
|
*
|
|
* example: set the 5th bit of byte 21 (21.5)
|
|
* a5 a4 a3 = 001 (byte 1)
|
|
* a2 a1 a0 = 101 (bit 5)
|
|
*
|
|
* byte1 = 0001 0100 (0x14)
|
|
* byte2 = 0001 1101 (0x1d)
|
|
*/
|
|
unsigned char byte1=0x10, byte2=0x10;
|
|
|
|
/* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
|
|
bytenum -= 20;
|
|
|
|
byte1 |= (!!value) << 2; /* set d */
|
|
byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
|
|
|
|
byte2 |= (bytenum & 0x1) << 3; /* set a3 */
|
|
byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
|
|
|
|
outb(byte1, PREP_IBM_PM1); /* first nibble */
|
|
mb();
|
|
udelay(100); /* important: let controller recover */
|
|
|
|
outb(byte2, PREP_IBM_PM1); /* second nibble */
|
|
mb();
|
|
udelay(100); /* important: let controller recover */
|
|
}
|
|
|
|
static void
|
|
prep_sig750_poweroff(void)
|
|
{
|
|
/* tweak the power manager found in most IBM PRePs (except Thinkpads) */
|
|
|
|
local_irq_disable();
|
|
/* set exception prefix high - to the prom */
|
|
_nmask_and_or_msr(0, MSR_IP);
|
|
|
|
utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
|
|
|
|
while (1) ;
|
|
/* not reached */
|
|
}
|
|
|
|
static int
|
|
prep_show_percpuinfo(struct seq_file *m, int i)
|
|
{
|
|
/* PREP's without residual data will give incorrect values here */
|
|
seq_printf(m, "clock\t\t: ");
|
|
if (have_residual_data)
|
|
seq_printf(m, "%ldMHz\n",
|
|
(res->VitalProductData.ProcessorHz > 1024) ?
|
|
res->VitalProductData.ProcessorHz / 1000000 :
|
|
res->VitalProductData.ProcessorHz);
|
|
else
|
|
seq_printf(m, "???\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SOUND_CS4232
|
|
static long __init masktoint(unsigned int i)
|
|
{
|
|
int t = -1;
|
|
while (i >> ++t)
|
|
;
|
|
return (t-1);
|
|
}
|
|
|
|
/*
|
|
* ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
|
|
* to distinguish sound dma-channels from others. This is because
|
|
* blocksize on 16 bit dma-channels 5,6,7 is 128k, but
|
|
* the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
|
|
*/
|
|
|
|
static void __init prep_init_sound(void)
|
|
{
|
|
PPC_DEVICE *audiodevice = NULL;
|
|
|
|
/*
|
|
* Get the needed resource informations from residual data.
|
|
*
|
|
*/
|
|
if (have_residual_data)
|
|
audiodevice = residual_find_device(~0, NULL,
|
|
MultimediaController, AudioController, -1, 0);
|
|
|
|
if (audiodevice != NULL) {
|
|
PnP_TAG_PACKET *pkt;
|
|
|
|
pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
|
|
S5_Packet, 0);
|
|
if (pkt != NULL)
|
|
ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
|
|
pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
|
|
S5_Packet, 1);
|
|
if (pkt != NULL)
|
|
ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
|
|
}
|
|
|
|
/*
|
|
* These are the PReP specs' defaults for the cs4231. We use these
|
|
* as fallback incase we don't have residual data.
|
|
* At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
|
|
* will use the other values.
|
|
*/
|
|
if (audiodevice == NULL) {
|
|
switch (_prep_type) {
|
|
case _PREP_IBM:
|
|
ppc_cs4232_dma = 1;
|
|
ppc_cs4232_dma2 = -1;
|
|
break;
|
|
default:
|
|
ppc_cs4232_dma = 6;
|
|
ppc_cs4232_dma2 = 7;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Find a way to push these informations to the cs4232 driver
|
|
* Give it out with printk, when not in cmd_line?
|
|
* Append it to cmd_line and saved_command_line?
|
|
* Format is cs4232=io,irq,dma,dma2
|
|
*/
|
|
}
|
|
#endif /* CONFIG_SOUND_CS4232 */
|
|
|
|
/*
|
|
* Fill out screen_info according to the residual data. This allows us to use
|
|
* at least vesafb.
|
|
*/
|
|
static void __init
|
|
prep_init_vesa(void)
|
|
{
|
|
#if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
|
|
defined(CONFIG_FB_VESA))
|
|
PPC_DEVICE *vgadev = NULL;
|
|
|
|
if (have_residual_data)
|
|
vgadev = residual_find_device(~0, NULL, DisplayController,
|
|
SVGAController, -1, 0);
|
|
|
|
if (vgadev != NULL) {
|
|
PnP_TAG_PACKET *pkt;
|
|
|
|
pkt = PnP_find_large_vendor_packet(
|
|
(unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
|
|
0x04, 0); /* 0x04 = Display Tag */
|
|
if (pkt != NULL) {
|
|
unsigned char *ptr = (unsigned char *)pkt;
|
|
|
|
if (ptr[4]) {
|
|
/* graphics mode */
|
|
screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
|
|
|
|
screen_info.lfb_depth = ptr[4] * 8;
|
|
|
|
screen_info.lfb_width = swab16(*(short *)(ptr+6));
|
|
screen_info.lfb_height = swab16(*(short *)(ptr+8));
|
|
screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
|
|
|
|
screen_info.lfb_base = swab32(*(long *)(ptr+12));
|
|
screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Set DBAT 2 to access 0x80000000 so early progress messages will work
|
|
*/
|
|
static __inline__ void
|
|
prep_set_bat(void)
|
|
{
|
|
/* wait for all outstanding memory access to complete */
|
|
mb();
|
|
|
|
/* setup DBATs */
|
|
mtspr(SPRN_DBAT2U, 0x80001ffe);
|
|
mtspr(SPRN_DBAT2L, 0x8000002a);
|
|
|
|
/* wait for updates */
|
|
mb();
|
|
}
|
|
|
|
/*
|
|
* IBM 3-digit status LED
|
|
*/
|
|
static unsigned int ibm_statusled_base;
|
|
|
|
static void
|
|
ibm_statusled_progress(char *s, unsigned short hex);
|
|
|
|
static int
|
|
ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
|
|
void * dummy3)
|
|
{
|
|
ibm_statusled_progress(NULL, 0x505); /* SOS */
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
static struct notifier_block ibm_statusled_block = {
|
|
ibm_statusled_panic,
|
|
NULL,
|
|
INT_MAX /* try to do it first */
|
|
};
|
|
|
|
static void
|
|
ibm_statusled_progress(char *s, unsigned short hex)
|
|
{
|
|
static int notifier_installed;
|
|
/*
|
|
* Progress uses 4 digits and we have only 3. So, we map 0xffff to
|
|
* 0xfff for display switch off. Out of range values are mapped to
|
|
* 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
|
|
* Install the panic notifier when the display is first switched off.
|
|
*/
|
|
if (hex == 0xffff) {
|
|
hex = 0xfff;
|
|
if (!notifier_installed) {
|
|
++notifier_installed;
|
|
notifier_chain_register(&panic_notifier_list,
|
|
&ibm_statusled_block);
|
|
}
|
|
}
|
|
else
|
|
if (hex > 0xfff)
|
|
hex = 0xeff;
|
|
|
|
mb();
|
|
outw(hex, ibm_statusled_base);
|
|
}
|
|
|
|
static void __init
|
|
ibm_statusled_init(void)
|
|
{
|
|
/*
|
|
* The IBM 3-digit LED display is specified in the residual data
|
|
* as an operator panel device, type "System Status LED". Find
|
|
* that device and determine its address. We validate all the
|
|
* other parameters on the off-chance another, similar device
|
|
* exists.
|
|
*/
|
|
if (have_residual_data) {
|
|
PPC_DEVICE *led;
|
|
PnP_TAG_PACKET *pkt;
|
|
|
|
led = residual_find_device(~0, NULL, SystemPeripheral,
|
|
OperatorPanel, SystemStatusLED, 0);
|
|
if (!led)
|
|
return;
|
|
|
|
pkt = PnP_find_packet((unsigned char *)
|
|
&res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
|
|
if (!pkt)
|
|
return;
|
|
|
|
if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
|
|
return;
|
|
if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
|
|
*(unsigned short *)pkt->S8_Pack.RangeMax)
|
|
return;
|
|
if (pkt->S8_Pack.IOAlign != 2)
|
|
return;
|
|
if (pkt->S8_Pack.IONum != 2)
|
|
return;
|
|
|
|
ibm_statusled_base = ld_le16((unsigned short *)
|
|
(pkt->S8_Pack.RangeMin));
|
|
ppc_md.progress = ibm_statusled_progress;
|
|
}
|
|
}
|
|
|
|
static void __init
|
|
prep_setup_arch(void)
|
|
{
|
|
unsigned char reg;
|
|
int is_ide=0;
|
|
|
|
/* init to some ~sane value until calibrate_delay() runs */
|
|
loops_per_jiffy = 50000000;
|
|
|
|
/* Lookup PCI host bridges */
|
|
prep_find_bridges();
|
|
|
|
/* Set up floppy in PS/2 mode */
|
|
outb(0x09, SIO_CONFIG_RA);
|
|
reg = inb(SIO_CONFIG_RD);
|
|
reg = (reg & 0x3F) | 0x40;
|
|
outb(reg, SIO_CONFIG_RD);
|
|
outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
|
|
|
|
switch ( _prep_type )
|
|
{
|
|
case _PREP_IBM:
|
|
reg = inb(PREP_IBM_PLANAR);
|
|
printk(KERN_INFO "IBM planar ID: %02x", reg);
|
|
switch (reg) {
|
|
case PREP_IBM_SANDALFOOT:
|
|
prep_gen_enable_l2();
|
|
setup_ibm_pci = prep_sandalfoot_setup_pci;
|
|
ppc_md.power_off = prep_sig750_poweroff;
|
|
ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
|
|
break;
|
|
case PREP_IBM_THINKPAD:
|
|
prep_gen_enable_l2();
|
|
setup_ibm_pci = prep_thinkpad_setup_pci;
|
|
ppc_md.power_off = prep_carrera_poweroff;
|
|
ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
|
|
break;
|
|
default:
|
|
if (have_residual_data) {
|
|
prep_gen_enable_l2();
|
|
setup_ibm_pci = prep_residual_setup_pci;
|
|
ppc_md.power_off = prep_halt;
|
|
ppc_md.show_cpuinfo = prep_gen_cpuinfo;
|
|
break;
|
|
}
|
|
else
|
|
printk(" - unknown! Assuming Carolina");
|
|
/* fall through */
|
|
case PREP_IBM_CAROLINA_IDE_0:
|
|
case PREP_IBM_CAROLINA_IDE_1:
|
|
case PREP_IBM_CAROLINA_IDE_2:
|
|
case PREP_IBM_CAROLINA_IDE_3:
|
|
is_ide = 1;
|
|
case PREP_IBM_CAROLINA_SCSI_0:
|
|
case PREP_IBM_CAROLINA_SCSI_1:
|
|
case PREP_IBM_CAROLINA_SCSI_2:
|
|
case PREP_IBM_CAROLINA_SCSI_3:
|
|
prep_carolina_enable_l2();
|
|
setup_ibm_pci = prep_carolina_setup_pci;
|
|
ppc_md.power_off = prep_sig750_poweroff;
|
|
ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
|
|
break;
|
|
case PREP_IBM_TIGER1_133:
|
|
case PREP_IBM_TIGER1_166:
|
|
case PREP_IBM_TIGER1_180:
|
|
case PREP_IBM_TIGER1_xxx:
|
|
case PREP_IBM_TIGER1_333:
|
|
prep_carolina_enable_l2();
|
|
setup_ibm_pci = prep_tiger1_setup_pci;
|
|
ppc_md.power_off = prep_sig750_poweroff;
|
|
ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
|
|
break;
|
|
}
|
|
printk("\n");
|
|
|
|
/* default root device */
|
|
if (is_ide)
|
|
ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
|
|
else
|
|
ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
|
|
|
|
break;
|
|
case _PREP_Motorola:
|
|
prep_gen_enable_l2();
|
|
ppc_md.power_off = prep_halt;
|
|
ppc_md.show_cpuinfo = prep_mot_cpuinfo;
|
|
|
|
#ifdef CONFIG_BLK_DEV_INITRD
|
|
if (initrd_start)
|
|
ROOT_DEV = Root_RAM0;
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_ROOT_NFS
|
|
ROOT_DEV = Root_NFS;
|
|
#else
|
|
ROOT_DEV = Root_SDA2;
|
|
#endif
|
|
break;
|
|
}
|
|
|
|
/* Read in NVRAM data */
|
|
init_prep_nvram();
|
|
|
|
/* if no bootargs, look in NVRAM */
|
|
if ( cmd_line[0] == '\0' ) {
|
|
char *bootargs;
|
|
bootargs = prep_nvram_get_var("bootargs");
|
|
if (bootargs != NULL) {
|
|
strcpy(cmd_line, bootargs);
|
|
/* again.. */
|
|
strcpy(saved_command_line, cmd_line);
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_SOUND_CS4232
|
|
prep_init_sound();
|
|
#endif /* CONFIG_SOUND_CS4232 */
|
|
|
|
prep_init_vesa();
|
|
|
|
switch (_prep_type) {
|
|
case _PREP_Motorola:
|
|
raven_init();
|
|
break;
|
|
case _PREP_IBM:
|
|
ibm_prep_init();
|
|
break;
|
|
}
|
|
|
|
#ifdef CONFIG_VGA_CONSOLE
|
|
/* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
|
|
vgacon_remap_base = 0xf0000000;
|
|
conswitchp = &vga_con;
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* First, see if we can get this information from the residual data.
|
|
* This is important on some IBM PReP systems. If we cannot, we let the
|
|
* TODC code handle doing this.
|
|
*/
|
|
static void __init
|
|
prep_calibrate_decr(void)
|
|
{
|
|
if (have_residual_data) {
|
|
unsigned long freq, divisor = 4;
|
|
|
|
if ( res->VitalProductData.ProcessorBusHz ) {
|
|
freq = res->VitalProductData.ProcessorBusHz;
|
|
printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
|
|
(freq/divisor)/1000000,
|
|
(freq/divisor)%1000000);
|
|
tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
|
|
tb_ticks_per_jiffy = freq / HZ / divisor;
|
|
}
|
|
}
|
|
else
|
|
todc_calibrate_decr();
|
|
}
|
|
|
|
static void __init
|
|
prep_init_IRQ(void)
|
|
{
|
|
unsigned int pci_viddid, pci_did;
|
|
|
|
if (OpenPIC_Addr != NULL) {
|
|
openpic_init(NUM_8259_INTERRUPTS);
|
|
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
|
|
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
|
|
i8259_irq);
|
|
}
|
|
|
|
if (have_residual_data) {
|
|
i8259_init(residual_isapic_addr(), 0);
|
|
return;
|
|
}
|
|
|
|
/* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
|
|
* controller, we poll (as they have a different int-ack address). */
|
|
early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
|
|
pci_did = (pci_viddid & 0xffff0000) >> 16;
|
|
if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
|
|
&& ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
|
|
|| (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
|
|
i8259_init(0, 0);
|
|
else
|
|
/* PCI interrupt ack address given in section 6.1.8 of the
|
|
* PReP specification. */
|
|
i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
|
|
}
|
|
|
|
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
|
|
/*
|
|
* IDE stuff.
|
|
*/
|
|
static int
|
|
prep_ide_default_irq(unsigned long base)
|
|
{
|
|
switch (base) {
|
|
case 0x1f0: return 13;
|
|
case 0x170: return 13;
|
|
case 0x1e8: return 11;
|
|
case 0x168: return 10;
|
|
case 0xfff0: return 14; /* MCP(N)750 ide0 */
|
|
case 0xffe0: return 15; /* MCP(N)750 ide1 */
|
|
default: return 0;
|
|
}
|
|
}
|
|
|
|
static unsigned long
|
|
prep_ide_default_io_base(int index)
|
|
{
|
|
switch (index) {
|
|
case 0: return 0x1f0;
|
|
case 1: return 0x170;
|
|
case 2: return 0x1e8;
|
|
case 3: return 0x168;
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SMP
|
|
/* PReP (MTX) support */
|
|
static int __init
|
|
smp_prep_probe(void)
|
|
{
|
|
extern int mot_multi;
|
|
|
|
if (mot_multi) {
|
|
openpic_request_IPIs();
|
|
smp_hw_index[1] = 1;
|
|
return 2;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void __init
|
|
smp_prep_kick_cpu(int nr)
|
|
{
|
|
*(unsigned long *)KERNELBASE = nr;
|
|
asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
|
|
printk("CPU1 released, waiting\n");
|
|
}
|
|
|
|
static void __init
|
|
smp_prep_setup_cpu(int cpu_nr)
|
|
{
|
|
if (OpenPIC_Addr)
|
|
do_openpic_setup_cpu();
|
|
}
|
|
|
|
static struct smp_ops_t prep_smp_ops = {
|
|
smp_openpic_message_pass,
|
|
smp_prep_probe,
|
|
smp_prep_kick_cpu,
|
|
smp_prep_setup_cpu,
|
|
.give_timebase = smp_generic_give_timebase,
|
|
.take_timebase = smp_generic_take_timebase,
|
|
};
|
|
#endif /* CONFIG_SMP */
|
|
|
|
/*
|
|
* Setup the bat mappings we're going to load that cover
|
|
* the io areas. RAM was mapped by mapin_ram().
|
|
* -- Cort
|
|
*/
|
|
static void __init
|
|
prep_map_io(void)
|
|
{
|
|
io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
|
|
io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
|
|
}
|
|
|
|
static int __init
|
|
prep_request_io(void)
|
|
{
|
|
if (_machine == _MACH_prep) {
|
|
#ifdef CONFIG_NVRAM
|
|
request_region(PREP_NVRAM_AS0, 0x8, "nvram");
|
|
#endif
|
|
request_region(0x00,0x20,"dma1");
|
|
request_region(0x40,0x20,"timer");
|
|
request_region(0x80,0x10,"dma page reg");
|
|
request_region(0xc0,0x20,"dma2");
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(prep_request_io);
|
|
|
|
void __init
|
|
prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|
unsigned long r6, unsigned long r7)
|
|
{
|
|
#ifdef CONFIG_PREP_RESIDUAL
|
|
/* make a copy of residual data */
|
|
if ( r3 ) {
|
|
memcpy((void *)res,(void *)(r3+KERNELBASE),
|
|
sizeof(RESIDUAL));
|
|
}
|
|
#endif
|
|
|
|
isa_io_base = PREP_ISA_IO_BASE;
|
|
isa_mem_base = PREP_ISA_MEM_BASE;
|
|
pci_dram_offset = PREP_PCI_DRAM_OFFSET;
|
|
ISA_DMA_THRESHOLD = 0x00ffffff;
|
|
DMA_MODE_READ = 0x44;
|
|
DMA_MODE_WRITE = 0x48;
|
|
ppc_do_canonicalize_irqs = 1;
|
|
|
|
/* figure out what kind of prep workstation we are */
|
|
if (have_residual_data) {
|
|
if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
|
|
_prep_type = _PREP_IBM;
|
|
else
|
|
_prep_type = _PREP_Motorola;
|
|
}
|
|
else {
|
|
/* assume motorola if no residual (netboot?) */
|
|
_prep_type = _PREP_Motorola;
|
|
}
|
|
|
|
#ifdef CONFIG_PREP_RESIDUAL
|
|
/* Switch off all residual data processing if the user requests it */
|
|
if (strstr(cmd_line, "noresidual") != NULL)
|
|
res = NULL;
|
|
#endif
|
|
|
|
/* Initialise progress early to get maximum benefit */
|
|
prep_set_bat();
|
|
ibm_statusled_init();
|
|
|
|
ppc_md.setup_arch = prep_setup_arch;
|
|
ppc_md.show_percpuinfo = prep_show_percpuinfo;
|
|
ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
|
|
ppc_md.init_IRQ = prep_init_IRQ;
|
|
/* this gets changed later on if we have an OpenPIC -- Cort */
|
|
ppc_md.get_irq = i8259_irq;
|
|
|
|
ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
|
|
|
|
ppc_md.restart = prep_restart;
|
|
ppc_md.power_off = NULL; /* set in prep_setup_arch() */
|
|
ppc_md.halt = prep_halt;
|
|
|
|
ppc_md.nvram_read_val = prep_nvram_read_val;
|
|
ppc_md.nvram_write_val = prep_nvram_write_val;
|
|
|
|
ppc_md.time_init = todc_time_init;
|
|
if (_prep_type == _PREP_IBM) {
|
|
ppc_md.rtc_read_val = todc_mc146818_read_val;
|
|
ppc_md.rtc_write_val = todc_mc146818_write_val;
|
|
TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
|
|
8);
|
|
} else {
|
|
TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
|
|
PREP_NVRAM_DATA, 8);
|
|
}
|
|
|
|
ppc_md.calibrate_decr = prep_calibrate_decr;
|
|
ppc_md.set_rtc_time = todc_set_rtc_time;
|
|
ppc_md.get_rtc_time = todc_get_rtc_time;
|
|
|
|
ppc_md.setup_io_mappings = prep_map_io;
|
|
|
|
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
|
|
ppc_ide_md.default_irq = prep_ide_default_irq;
|
|
ppc_ide_md.default_io_base = prep_ide_default_io_base;
|
|
#endif
|
|
|
|
#ifdef CONFIG_SMP
|
|
smp_ops = &prep_smp_ops;
|
|
#endif /* CONFIG_SMP */
|
|
}
|