2c36fac485
Remove defined constants not being used. Signed-off-by: Armando Uribe <x0095078@ti.com> Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
145 lines
4.0 KiB
C
145 lines
4.0 KiB
C
/*
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* mbx_sh.h
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Definitions for shared mailbox cmd/data values.(used on both
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* the GPP and DSP sides).
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*
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* Copyright (C) 2008 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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/*
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* Bridge usage of OMAP mailbox 1 is determined by the "class" of the
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* mailbox interrupt's cmd value received. The class value are defined
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* as a bit (10 thru 15) being set.
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*
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* Note: Only 16 bits of each is used. Other 16 bit data reg available.
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*
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* 16 bit Mbx bit defns:
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*
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* A). Exception/Error handling (Module DEH) : class = 0.
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*
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* 15 10 0
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* ---------------------------------
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* |0|0|0|0|0|0|x|x|x|x|x|x|x|x|x|x|
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* ---------------------------------
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* | (class) | (module specific) |
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*
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*
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* B: DSP-DMA link driver channels (DDMA) : class = 1.
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*
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* 15 10 0
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* ---------------------------------
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* |0|0|0|0|0|1|b|b|b|b|b|c|c|c|c|c|
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* ---------------------------------
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* | (class) | (module specific) |
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*
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* where b -> buffer index (32 DDMA buffers/chnl max)
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* c -> channel Id (32 DDMA chnls max)
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*
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*
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* C: Proc-copy link driver channels (PCPY) : class = 2.
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*
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* 15 10 0
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* ---------------------------------
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* |0|0|0|0|1|0|x|x|x|x|x|x|x|x|x|x|
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* ---------------------------------
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* | (class) | (module specific) |
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*
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*
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* D: Zero-copy link driver channels (DDZC) : class = 4.
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*
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* 15 10 0
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* ---------------------------------
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* |0|0|0|1|0|0|x|x|x|x|x|c|c|c|c|c|
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* ---------------------------------
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* | (class) | (module specific) |
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*
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* where x -> not used
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* c -> channel Id (32 ZCPY chnls max)
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*
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*
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* E: Power management : class = 8.
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*
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* 15 10 0
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* ---------------------------------
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* |0|0|1|0|0|0|x|x|x|x|x|c|c|c|c|c|
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* 0010 00xx xxxc cccc
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* 0010 00nn pppp qqqq
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* nn:
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* 00 = reserved
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* 01 = pwr state change
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* 10 = opp pre-change
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* 11 = opp post-change
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*
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* if nn = pwr state change:
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* pppp = don't care
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* qqqq:
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* 0010 = hibernate
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* 0010 0001 0000 0010
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* 0110 = retention
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* 0010 0001 0000 0110
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* others reserved
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*
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* if nn = opp pre-change:
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* pppp = current opp
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* qqqq = next opp
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*
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* if nn = opp post-change:
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* pppp = prev opp
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* qqqq = current opp
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*
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* ---------------------------------
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* | (class) | (module specific) |
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*
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* where x -> not used
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* c -> Power management command
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*
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*/
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#ifndef _MBX_SH_H
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#define _MBX_SH_H
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#define MBX_PCPY_CLASS 0x0800 /* PROC-COPY " */
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#define MBX_PM_CLASS 0x2000 /* Power Management */
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#define MBX_DBG_CLASS 0x4000 /* For debugging purpose */
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/*
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* Exception Handler codes
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* Magic code used to determine if DSP signaled exception.
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*/
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#define MBX_DEH_BASE 0x0
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#define MBX_DEH_USERS_BASE 0x100 /* 256 */
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#define MBX_DEH_LIMIT 0x3FF /* 1023 */
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#define MBX_DEH_RESET 0x101 /* DSP RESET (DEH) */
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/*
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* Link driver command/status codes.
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*/
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/* Power Management Commands */
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#define MBX_PM_DSPIDLE (MBX_PM_CLASS + 0x0)
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#define MBX_PM_DSPWAKEUP (MBX_PM_CLASS + 0x1)
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#define MBX_PM_EMERGENCYSLEEP (MBX_PM_CLASS + 0x2)
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#define MBX_PM_SETPOINT_PRENOTIFY (MBX_PM_CLASS + 0x6)
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#define MBX_PM_SETPOINT_POSTNOTIFY (MBX_PM_CLASS + 0x7)
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#define MBX_PM_DSPRETENTION (MBX_PM_CLASS + 0x8)
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#define MBX_PM_DSPHIBERNATE (MBX_PM_CLASS + 0x9)
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#define MBX_PM_HIBERNATE_EN (MBX_PM_CLASS + 0xA)
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#define MBX_PM_OPP_REQ (MBX_PM_CLASS + 0xB)
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/* Bridge Debug Commands */
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#define MBX_DBG_SYSPRINTF (MBX_DBG_CLASS + 0x0)
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#endif /* _MBX_SH_H */
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