Ben Skeggs e5f186c4f9 drm/nv44/vm: fix and enable use of "real" pciegart ... Something seems to be missing in regards to flushing specific ranges of the TLB. For the moment, flushing the entire thing seems to make it work alright. Should give 39-bit DMA addressing on the relevant chipsets. v2: allocate contig 16KiB for dummy pages, reported by mwk on irc Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2012-10-03 13:13:17 +10:00
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drm	drm/nv44/vm: fix and enable use of "real" pciegart	2012-10-03 13:13:17 +10:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	vga_switcheroo: Don't require handler init callback	2012-08-17 17:34:41 -04:00
Makefile	gpu: Add Intel GMA500(Poulsbo) Stub Driver	2010-10-26 11:00:13 +10:00