dcfb81d61d
OMAP-L137/AM17x has limited number of dedicated EMIFA address pins, enough to interface directly to an SDRAM. If a device such as an asynchronous flash needs to be attached to the EMIFA, then either GPIO pins or a chip select may be used to control the flash device's upper address lines. This patch adds support for the NOR flash on the OMAP-L137/ AM17x user interface daughter board using the latch-addr-flash MTD mapping driver which allows flashes to be partially physically addressed. The upper address lines are set by a board specific code which is a separate patch. Signed-off-by: David Griego <dgriego@mvista.com> Signed-off-by: Aleksey Makarov <amakarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Savinay Dharmappa <savinay.dharmappa@ti.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> |
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.. | ||
bbm.h | ||
blktrans.h | ||
cfi_endian.h | ||
cfi.h | ||
concat.h | ||
doc2000.h | ||
flashchip.h | ||
fsmc.h | ||
ftl.h | ||
gen_probe.h | ||
inftl.h | ||
latch-addr-flash.h | ||
map.h | ||
mtd.h | ||
mtdram.h | ||
nand_ecc.h | ||
nand-gpio.h | ||
nand.h | ||
ndfc.h | ||
nftl.h | ||
onenand_regs.h | ||
onenand.h | ||
partitions.h | ||
pfow.h | ||
physmap.h | ||
pismo.h | ||
plat-ram.h | ||
pmc551.h | ||
qinfo.h | ||
sh_flctl.h | ||
sharpsl.h | ||
super.h | ||
ubi.h | ||
xip.h |