f7d452f4fd
- Various fixes that make surviving concurrent piglit more possible. - Buffer object deletion no longer synchronous - Context/register initialisation updates that have been reported to solve some stability issues (particularly on some problematic GF119 chips) - Kernel side support for VP2 video decoding engines * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (44 commits) drm/nvd0-/disp: handle case where display engine is missing/disabled drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 drm/nouveau/bsp/nv84: initial vp2 engine implementation drm/nouveau/vp/nv84: initial vp2 engine implementation drm/nouveau/core: xtensa engine base class implementation drm/nouveau/vdec: fork vp3 implementations from vp2 drm/nouveau/core: move falcon class to engine/ drm/nouveau/kms: don't fail if there's no dcb table entries drm/nouveau: remove limit on gart drm/nouveau/vm: perform a bar flush when flushing vm drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches drm/nvc8/gr: update initial register/context values drm/nvc4/gr: update initial register/context values drm/nvc1/gr: update initial register/context values drm/nvc3/gr: update initial register/context values drm/nvc0/gr: update initial register/context values drm/nvd9/gr: update initial register/context values drm/nve4/gr: update initial register/context values drm/nvc0-/gr: bump maximum gpc/tpc limits drm/nvf0/gr: initial register/context setup ...
433 lines
11 KiB
C
433 lines
11 KiB
C
/*
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* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
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* All Rights Reserved.
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* Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <subdev/fb.h>
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#include <subdev/vm.h>
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#include <subdev/instmem.h>
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#include "nouveau_drm.h"
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#include "nouveau_ttm.h"
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#include "nouveau_gem.h"
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static int
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nouveau_vram_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
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{
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struct nouveau_drm *drm = nouveau_bdev(man->bdev);
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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man->priv = pfb;
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return 0;
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}
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static int
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nouveau_vram_manager_fini(struct ttm_mem_type_manager *man)
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{
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man->priv = NULL;
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return 0;
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}
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static inline void
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nouveau_mem_node_cleanup(struct nouveau_mem *node)
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{
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if (node->vma[0].node) {
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nouveau_vm_unmap(&node->vma[0]);
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nouveau_vm_put(&node->vma[0]);
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}
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if (node->vma[1].node) {
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nouveau_vm_unmap(&node->vma[1]);
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nouveau_vm_put(&node->vma[1]);
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}
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}
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static void
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nouveau_vram_manager_del(struct ttm_mem_type_manager *man,
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struct ttm_mem_reg *mem)
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{
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struct nouveau_drm *drm = nouveau_bdev(man->bdev);
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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nouveau_mem_node_cleanup(mem->mm_node);
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pfb->ram->put(pfb, (struct nouveau_mem **)&mem->mm_node);
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}
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static int
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nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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struct ttm_placement *placement,
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struct ttm_mem_reg *mem)
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{
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struct nouveau_drm *drm = nouveau_bdev(man->bdev);
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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struct nouveau_mem *node;
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u32 size_nc = 0;
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int ret;
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if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG)
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size_nc = 1 << nvbo->page_shift;
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ret = pfb->ram->get(pfb, mem->num_pages << PAGE_SHIFT,
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mem->page_alignment << PAGE_SHIFT, size_nc,
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(nvbo->tile_flags >> 8) & 0x3ff, &node);
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if (ret) {
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mem->mm_node = NULL;
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return (ret == -ENOSPC) ? 0 : ret;
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}
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node->page_shift = nvbo->page_shift;
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mem->mm_node = node;
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mem->start = node->offset >> PAGE_SHIFT;
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return 0;
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}
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static void
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nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
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{
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struct nouveau_fb *pfb = man->priv;
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struct nouveau_mm *mm = &pfb->vram;
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struct nouveau_mm_node *r;
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u32 total = 0, free = 0;
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mutex_lock(&nv_subdev(pfb)->mutex);
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list_for_each_entry(r, &mm->nodes, nl_entry) {
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printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n",
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prefix, r->type, ((u64)r->offset << 12),
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(((u64)r->offset + r->length) << 12));
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total += r->length;
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if (!r->type)
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free += r->length;
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}
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mutex_unlock(&nv_subdev(pfb)->mutex);
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printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n",
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prefix, (u64)total << 12, (u64)free << 12);
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printk(KERN_DEBUG "%s block: 0x%08x\n",
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prefix, mm->block_size << 12);
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}
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const struct ttm_mem_type_manager_func nouveau_vram_manager = {
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nouveau_vram_manager_init,
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nouveau_vram_manager_fini,
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nouveau_vram_manager_new,
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nouveau_vram_manager_del,
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nouveau_vram_manager_debug
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};
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static int
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nouveau_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
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{
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return 0;
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}
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static int
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nouveau_gart_manager_fini(struct ttm_mem_type_manager *man)
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{
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return 0;
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}
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static void
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nouveau_gart_manager_del(struct ttm_mem_type_manager *man,
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struct ttm_mem_reg *mem)
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{
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nouveau_mem_node_cleanup(mem->mm_node);
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kfree(mem->mm_node);
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mem->mm_node = NULL;
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}
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static int
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nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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struct ttm_placement *placement,
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struct ttm_mem_reg *mem)
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{
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struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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struct nouveau_mem *node;
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node = kzalloc(sizeof(*node), GFP_KERNEL);
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if (!node)
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return -ENOMEM;
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node->page_shift = 12;
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switch (nv_device(drm->device)->card_type) {
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case NV_50:
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if (nv_device(drm->device)->chipset != 0x50)
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node->memtype = (nvbo->tile_flags & 0x7f00) >> 8;
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break;
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case NV_C0:
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case NV_D0:
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case NV_E0:
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node->memtype = (nvbo->tile_flags & 0xff00) >> 8;
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break;
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default:
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break;
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}
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mem->mm_node = node;
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mem->start = 0;
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return 0;
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}
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static void
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nouveau_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
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{
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}
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const struct ttm_mem_type_manager_func nouveau_gart_manager = {
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nouveau_gart_manager_init,
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nouveau_gart_manager_fini,
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nouveau_gart_manager_new,
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nouveau_gart_manager_del,
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nouveau_gart_manager_debug
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};
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#include <core/subdev/vm/nv04.h>
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static int
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nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
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{
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struct nouveau_drm *drm = nouveau_bdev(man->bdev);
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struct nouveau_vmmgr *vmm = nouveau_vmmgr(drm->device);
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struct nv04_vmmgr_priv *priv = (void *)vmm;
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struct nouveau_vm *vm = NULL;
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nouveau_vm_ref(priv->vm, &vm, NULL);
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man->priv = vm;
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return 0;
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}
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static int
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nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
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{
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struct nouveau_vm *vm = man->priv;
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nouveau_vm_ref(NULL, &vm, NULL);
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man->priv = NULL;
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return 0;
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}
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static void
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nv04_gart_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *mem)
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{
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struct nouveau_mem *node = mem->mm_node;
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if (node->vma[0].node)
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nouveau_vm_put(&node->vma[0]);
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kfree(mem->mm_node);
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mem->mm_node = NULL;
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}
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static int
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nv04_gart_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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struct ttm_placement *placement,
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struct ttm_mem_reg *mem)
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{
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struct nouveau_mem *node;
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int ret;
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node = kzalloc(sizeof(*node), GFP_KERNEL);
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if (!node)
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return -ENOMEM;
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node->page_shift = 12;
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ret = nouveau_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
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NV_MEM_ACCESS_RW, &node->vma[0]);
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if (ret) {
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kfree(node);
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return ret;
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}
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mem->mm_node = node;
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mem->start = node->vma[0].offset >> PAGE_SHIFT;
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return 0;
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}
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static void
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nv04_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
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{
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}
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const struct ttm_mem_type_manager_func nv04_gart_manager = {
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nv04_gart_manager_init,
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nv04_gart_manager_fini,
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nv04_gart_manager_new,
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nv04_gart_manager_del,
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nv04_gart_manager_debug
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};
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int
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nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
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{
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struct drm_file *file_priv = filp->private_data;
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struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
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if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
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return drm_mmap(filp, vma);
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return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
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}
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static int
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nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
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{
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return ttm_mem_global_init(ref->object);
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}
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static void
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nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
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{
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ttm_mem_global_release(ref->object);
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}
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int
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nouveau_ttm_global_init(struct nouveau_drm *drm)
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{
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struct drm_global_reference *global_ref;
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int ret;
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global_ref = &drm->ttm.mem_global_ref;
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global_ref->global_type = DRM_GLOBAL_TTM_MEM;
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global_ref->size = sizeof(struct ttm_mem_global);
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global_ref->init = &nouveau_ttm_mem_global_init;
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global_ref->release = &nouveau_ttm_mem_global_release;
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ret = drm_global_item_ref(global_ref);
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if (unlikely(ret != 0)) {
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DRM_ERROR("Failed setting up TTM memory accounting\n");
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drm->ttm.mem_global_ref.release = NULL;
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return ret;
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}
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drm->ttm.bo_global_ref.mem_glob = global_ref->object;
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global_ref = &drm->ttm.bo_global_ref.ref;
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global_ref->global_type = DRM_GLOBAL_TTM_BO;
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global_ref->size = sizeof(struct ttm_bo_global);
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global_ref->init = &ttm_bo_global_init;
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global_ref->release = &ttm_bo_global_release;
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ret = drm_global_item_ref(global_ref);
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if (unlikely(ret != 0)) {
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DRM_ERROR("Failed setting up TTM BO subsystem\n");
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drm_global_item_unref(&drm->ttm.mem_global_ref);
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drm->ttm.mem_global_ref.release = NULL;
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return ret;
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}
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return 0;
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}
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void
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nouveau_ttm_global_release(struct nouveau_drm *drm)
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{
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if (drm->ttm.mem_global_ref.release == NULL)
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return;
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drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
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drm_global_item_unref(&drm->ttm.mem_global_ref);
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drm->ttm.mem_global_ref.release = NULL;
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}
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int
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nouveau_ttm_init(struct nouveau_drm *drm)
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{
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struct drm_device *dev = drm->dev;
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u32 bits;
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int ret;
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bits = nouveau_vmmgr(drm->device)->dma_bits;
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if ( drm->agp.stat == ENABLED ||
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!pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
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bits = 32;
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ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
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if (ret)
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return ret;
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ret = pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
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if (ret)
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pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(32));
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ret = nouveau_ttm_global_init(drm);
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if (ret)
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return ret;
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ret = ttm_bo_device_init(&drm->ttm.bdev,
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drm->ttm.bo_global_ref.ref.object,
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&nouveau_bo_driver, DRM_FILE_PAGE_OFFSET,
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bits <= 32 ? true : false);
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if (ret) {
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NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
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return ret;
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}
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/* VRAM init */
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drm->gem.vram_available = nouveau_fb(drm->device)->ram->size;
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drm->gem.vram_available -= nouveau_instmem(drm->device)->reserved;
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ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
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drm->gem.vram_available >> PAGE_SHIFT);
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if (ret) {
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NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
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return ret;
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}
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drm->ttm.mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 1),
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pci_resource_len(dev->pdev, 1));
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/* GART init */
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if (drm->agp.stat != ENABLED) {
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drm->gem.gart_available = nouveau_vmmgr(drm->device)->limit;
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} else {
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drm->gem.gart_available = drm->agp.size;
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}
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ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
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drm->gem.gart_available >> PAGE_SHIFT);
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if (ret) {
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NV_ERROR(drm, "GART mm init failed, %d\n", ret);
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return ret;
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}
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NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
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NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
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return 0;
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}
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void
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nouveau_ttm_fini(struct nouveau_drm *drm)
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{
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mutex_lock(&drm->dev->struct_mutex);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
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mutex_unlock(&drm->dev->struct_mutex);
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ttm_bo_device_release(&drm->ttm.bdev);
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nouveau_ttm_global_release(drm);
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arch_phys_wc_del(drm->ttm.mtrr);
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drm->ttm.mtrr = 0;
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}
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