33f7ec81fb
Some initiator modules in OMAP2 & 3 does not have IDLEST bit, in that case we cannot detect the module readiness by polling that bit and must exist the function immediately assuming that the module is ready. The previous flag was affected to the OCP interface. While it is technically true that the idlest is related to the L4 slave interface of the module, the PRCM status belong to the module. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
535 lines
18 KiB
C
535 lines
18 KiB
C
/*
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* omap_hwmod macros, structures
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*
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* Copyright (C) 2009 Nokia Corporation
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* Paul Walmsley
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*
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* Created in collaboration with (alphabetical order): Benoît Cousson,
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* Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
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* Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* These headers and macros are used to define OMAP on-chip module
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* data and their integration with other OMAP modules and Linux.
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*
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* References:
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* - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
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* - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
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* - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
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* - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
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* - Open Core Protocol Specification 2.2
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*
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* To do:
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* - add interconnect error log structures
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* - add pinmuxing
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* - init_conn_id_bit (CONNID_BIT_VECTOR)
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* - implement default hwmod SMS/SDRC flags?
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*
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*/
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#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
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#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/ioport.h>
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#include <plat/cpu.h>
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struct omap_device;
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extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
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extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
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/*
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* OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
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* with the original PRCM protocol defined for OMAP2420
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*/
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#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
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#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
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#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
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#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
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#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
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#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
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#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
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#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
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#define SYSC_TYPE1_SOFTRESET_SHIFT 1
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#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
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#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
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#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
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/*
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* OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
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* with the new PRCM protocol defined for new OMAP4 IPs.
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*/
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#define SYSC_TYPE2_SOFTRESET_SHIFT 0
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#define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
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#define SYSC_TYPE2_SIDLEMODE_SHIFT 2
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#define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
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#define SYSC_TYPE2_MIDLEMODE_SHIFT 4
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#define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
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/* OCP SYSSTATUS bit shifts/masks */
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#define SYSS_RESETDONE_SHIFT 0
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#define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
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/* Master standby/slave idle mode flags */
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#define HWMOD_IDLEMODE_FORCE (1 << 0)
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#define HWMOD_IDLEMODE_NO (1 << 1)
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#define HWMOD_IDLEMODE_SMART (1 << 2)
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/**
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* struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
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* @name: name of the IRQ channel (module local name)
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* @irq_ch: IRQ channel ID
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*
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* @name should be something short, e.g., "tx" or "rx". It is for use
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* by platform_get_resource_byname(). It is defined locally to the
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* hwmod.
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*/
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struct omap_hwmod_irq_info {
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const char *name;
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u16 irq;
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};
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/**
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* struct omap_hwmod_dma_info - DMA channels used by the hwmod
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* @name: name of the DMA channel (module local name)
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* @dma_ch: DMA channel ID
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*
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* @name should be something short, e.g., "tx" or "rx". It is for use
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* by platform_get_resource_byname(). It is defined locally to the
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* hwmod.
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*/
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struct omap_hwmod_dma_info {
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const char *name;
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u16 dma_ch;
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};
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/**
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* struct omap_hwmod_opt_clk - optional clocks used by this hwmod
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* @role: "sys", "32k", "tv", etc -- for use in clk_get()
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* @clk: opt clock: OMAP clock name
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* @_clk: pointer to the struct clk (filled in at runtime)
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*
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* The module's interface clock and main functional clock should not
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* be added as optional clocks.
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*/
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struct omap_hwmod_opt_clk {
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const char *role;
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const char *clk;
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struct clk *_clk;
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};
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/* omap_hwmod_omap2_firewall.flags bits */
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#define OMAP_FIREWALL_L3 (1 << 0)
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#define OMAP_FIREWALL_L4 (1 << 1)
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/**
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* struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
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* @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
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* @l4_fw_region: L4 firewall region ID
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* @l4_prot_group: L4 protection group ID
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* @flags: (see omap_hwmod_omap2_firewall.flags macros above)
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*/
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struct omap_hwmod_omap2_firewall {
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u8 l3_perm_bit;
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u8 l4_fw_region;
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u8 l4_prot_group;
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u8 flags;
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};
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/*
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* omap_hwmod_addr_space.flags bits
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*
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* ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
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* ADDR_TYPE_RT: Address space contains module register target data.
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*/
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#define ADDR_MAP_ON_INIT (1 << 0)
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#define ADDR_TYPE_RT (1 << 1)
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/**
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* struct omap_hwmod_addr_space - MPU address space handled by the hwmod
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* @pa_start: starting physical address
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* @pa_end: ending physical address
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* @flags: (see omap_hwmod_addr_space.flags macros above)
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*
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* Address space doesn't necessarily follow physical interconnect
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* structure. GPMC is one example.
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*/
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struct omap_hwmod_addr_space {
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u32 pa_start;
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u32 pa_end;
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u8 flags;
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};
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/*
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* omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
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* interface to interact with the hwmod. Used to add sleep dependencies
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* when the module is enabled or disabled.
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*/
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#define OCP_USER_MPU (1 << 0)
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#define OCP_USER_SDMA (1 << 1)
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/* omap_hwmod_ocp_if.flags bits */
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#define OCPIF_SWSUP_IDLE (1 << 0)
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#define OCPIF_CAN_BURST (1 << 1)
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/**
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* struct omap_hwmod_ocp_if - OCP interface data
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* @master: struct omap_hwmod that initiates OCP transactions on this link
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* @slave: struct omap_hwmod that responds to OCP transactions on this link
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* @addr: address space associated with this link
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* @clk: interface clock: OMAP clock name
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* @_clk: pointer to the interface struct clk (filled in at runtime)
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* @fw: interface firewall data
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* @addr_cnt: ARRAY_SIZE(@addr)
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* @width: OCP data width
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* @thread_cnt: number of threads
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* @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
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* @user: initiators using this interface (see OCP_USER_* macros above)
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* @flags: OCP interface flags (see OCPIF_* macros above)
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*
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* It may also be useful to add a tag_cnt field for OCP2.x devices.
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*
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* Parameter names beginning with an underscore are managed internally by
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* the omap_hwmod code and should not be set during initialization.
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*/
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struct omap_hwmod_ocp_if {
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struct omap_hwmod *master;
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struct omap_hwmod *slave;
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struct omap_hwmod_addr_space *addr;
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const char *clk;
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struct clk *_clk;
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union {
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struct omap_hwmod_omap2_firewall omap2;
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} fw;
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u8 addr_cnt;
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u8 width;
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u8 thread_cnt;
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u8 max_burst_len;
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u8 user;
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u8 flags;
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};
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/* Macros for use in struct omap_hwmod_sysconfig */
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/* Flags for use in omap_hwmod_sysconfig.idlemodes */
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#define MASTER_STANDBY_SHIFT 2
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#define SLAVE_IDLE_SHIFT 0
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#define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
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#define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
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#define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
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#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
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#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
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#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
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/* omap_hwmod_sysconfig.sysc_flags capability flags */
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#define SYSC_HAS_AUTOIDLE (1 << 0)
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#define SYSC_HAS_SOFTRESET (1 << 1)
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#define SYSC_HAS_ENAWAKEUP (1 << 2)
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#define SYSC_HAS_EMUFREE (1 << 3)
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#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
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#define SYSC_HAS_SIDLEMODE (1 << 5)
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#define SYSC_HAS_MIDLEMODE (1 << 6)
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#define SYSS_MISSING (1 << 7)
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#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
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/* omap_hwmod_sysconfig.clockact flags */
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#define CLOCKACT_TEST_BOTH 0x0
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#define CLOCKACT_TEST_MAIN 0x1
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#define CLOCKACT_TEST_ICLK 0x2
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#define CLOCKACT_TEST_NONE 0x3
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/**
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* struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
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* @midle_shift: Offset of the midle bit
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* @clkact_shift: Offset of the clockactivity bit
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* @sidle_shift: Offset of the sidle bit
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* @enwkup_shift: Offset of the enawakeup bit
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* @srst_shift: Offset of the softreset bit
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* @autoidle_shift: Offset of the autoidle bit
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*/
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struct omap_hwmod_sysc_fields {
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u8 midle_shift;
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u8 clkact_shift;
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u8 sidle_shift;
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u8 enwkup_shift;
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u8 srst_shift;
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u8 autoidle_shift;
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};
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/**
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* struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
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* @rev_offs: IP block revision register offset (from module base addr)
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* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
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* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
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* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
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* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
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* @clockact: the default value of the module CLOCKACTIVITY bits
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*
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* @clockact describes to the module which clocks are likely to be
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* disabled when the PRCM issues its idle request to the module. Some
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* modules have separate clockdomains for the interface clock and main
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* functional clock, and can check whether they should acknowledge the
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* idle request based on the internal module functionality that has
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* been associated with the clocks marked in @clockact. This field is
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* only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
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*
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* @sysc_fields: structure containing the offset positions of various bits in
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* SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
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* omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
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* whether the device ip is compliant with the original PRCM protocol
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* defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
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* If the device follows a different scheme for the sysconfig register ,
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* then this field has to be populated with the correct offset structure.
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*/
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struct omap_hwmod_class_sysconfig {
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u16 rev_offs;
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u16 sysc_offs;
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u16 syss_offs;
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u16 sysc_flags;
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u8 idlemodes;
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u8 clockact;
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struct omap_hwmod_sysc_fields *sysc_fields;
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};
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/**
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* struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
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* @module_offs: PRCM submodule offset from the start of the PRM/CM
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* @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
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* @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
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* @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
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* @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
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* @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
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*
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* @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
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* WKEN, GRPSEL registers. In an ideal world, no extra information
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* would be needed for IDLEST information, but alas, there are some
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* exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
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* are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
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*/
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struct omap_hwmod_omap2_prcm {
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s16 module_offs;
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u8 prcm_reg_id;
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u8 module_bit;
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u8 idlest_reg_id;
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u8 idlest_idle_bit;
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u8 idlest_stdby_bit;
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};
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/**
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* struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
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* @clkctrl_reg: PRCM address of the clock control register
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* @submodule_wkdep_bit: bit shift of the WKDEP range
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*/
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struct omap_hwmod_omap4_prcm {
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void __iomem *clkctrl_reg;
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u8 submodule_wkdep_bit;
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};
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/*
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* omap_hwmod.flags definitions
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*
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* HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
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* of idle, rather than relying on module smart-idle
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* HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
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* of standby, rather than relying on module smart-standby
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* HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
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* SDRAM controller, etc.
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* HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
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* controller, etc.
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* HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
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* when module is enabled, rather than the default, which is to
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* enable autoidle
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* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
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* HWMOD_NO_IDLEST : this module does not have idle status - this is the case
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* only for few initiator modules on OMAP2 & 3.
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*/
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#define HWMOD_SWSUP_SIDLE (1 << 0)
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#define HWMOD_SWSUP_MSTANDBY (1 << 1)
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#define HWMOD_INIT_NO_RESET (1 << 2)
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#define HWMOD_INIT_NO_IDLE (1 << 3)
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#define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
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#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
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#define HWMOD_NO_IDLEST (1 << 6)
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/*
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* omap_hwmod._int_flags definitions
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* These are for internal use only and are managed by the omap_hwmod code.
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*
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* _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
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* _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
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* _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
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*/
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#define _HWMOD_NO_MPU_PORT (1 << 0)
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#define _HWMOD_WAKEUP_ENABLED (1 << 1)
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#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
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/*
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* omap_hwmod._state definitions
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*
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* INITIALIZED: reset (optionally), initialized, enabled, disabled
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* (optionally)
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*
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*
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*/
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#define _HWMOD_STATE_UNKNOWN 0
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#define _HWMOD_STATE_REGISTERED 1
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#define _HWMOD_STATE_CLKS_INITED 2
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#define _HWMOD_STATE_INITIALIZED 3
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#define _HWMOD_STATE_ENABLED 4
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#define _HWMOD_STATE_IDLE 5
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#define _HWMOD_STATE_DISABLED 6
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/**
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* struct omap_hwmod_class - the type of an IP block
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* @name: name of the hwmod_class
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* @sysc: device SYSCONFIG/SYSSTATUS register data
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* @rev: revision of the IP class
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*
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* Represent the class of a OMAP hardware "modules" (e.g. timer,
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* smartreflex, gpio, uart...)
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*/
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struct omap_hwmod_class {
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const char *name;
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struct omap_hwmod_class_sysconfig *sysc;
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u32 rev;
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};
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/**
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* struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
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* @name: name of the hwmod
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* @class: struct omap_hwmod_class * to the class of this hwmod
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* @od: struct omap_device currently associated with this hwmod (internal use)
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* @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
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* @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
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* @prcm: PRCM data pertaining to this hwmod
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* @main_clk: main clock: OMAP clock name
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* @_clk: pointer to the main struct clk (filled in at runtime)
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* @opt_clks: other device clocks that drivers can request (0..*)
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* @masters: ptr to array of OCP ifs that this hwmod can initiate on
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* @slaves: ptr to array of OCP ifs that this hwmod can respond on
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* @dev_attr: arbitrary device attributes that can be passed to the driver
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* @_sysc_cache: internal-use hwmod flags
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* @_rt_va: cached register target start address (internal use)
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* @_mpu_port_index: cached MPU register target slave ID (internal use)
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* @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
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* @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
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* @mpu_irqs_cnt: number of @mpu_irqs
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* @sdma_chs_cnt: number of @sdma_chs
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* @opt_clks_cnt: number of @opt_clks
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* @master_cnt: number of @master entries
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* @slaves_cnt: number of @slave entries
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* @response_lat: device OCP response latency (in interface clock cycles)
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* @_int_flags: internal-use hwmod flags
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* @_state: internal-use hwmod state
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* @flags: hwmod flags (documented below)
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* @omap_chip: OMAP chips this hwmod is present on
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* @node: list node for hwmod list (internal use)
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*
|
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* @main_clk refers to this module's "main clock," which for our
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* purposes is defined as "the functional clock needed for register
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* accesses to complete." Modules may not have a main clock if the
|
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* interface clock also serves as a main clock.
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*
|
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* Parameter names beginning with an underscore are managed internally by
|
|
* the omap_hwmod code and should not be set during initialization.
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|
*/
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struct omap_hwmod {
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const char *name;
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struct omap_hwmod_class *class;
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struct omap_device *od;
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struct omap_hwmod_irq_info *mpu_irqs;
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struct omap_hwmod_dma_info *sdma_chs;
|
|
union {
|
|
struct omap_hwmod_omap2_prcm omap2;
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|
struct omap_hwmod_omap4_prcm omap4;
|
|
} prcm;
|
|
const char *main_clk;
|
|
struct clk *_clk;
|
|
struct omap_hwmod_opt_clk *opt_clks;
|
|
struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
|
|
struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
|
|
void *dev_attr;
|
|
u32 _sysc_cache;
|
|
void __iomem *_rt_va;
|
|
struct list_head node;
|
|
u16 flags;
|
|
u8 _mpu_port_index;
|
|
u8 msuspendmux_reg_id;
|
|
u8 msuspendmux_shift;
|
|
u8 response_lat;
|
|
u8 mpu_irqs_cnt;
|
|
u8 sdma_chs_cnt;
|
|
u8 opt_clks_cnt;
|
|
u8 masters_cnt;
|
|
u8 slaves_cnt;
|
|
u8 hwmods_cnt;
|
|
u8 _int_flags;
|
|
u8 _state;
|
|
const struct omap_chip_id omap_chip;
|
|
};
|
|
|
|
int omap_hwmod_init(struct omap_hwmod **ohs);
|
|
int omap_hwmod_register(struct omap_hwmod *oh);
|
|
int omap_hwmod_unregister(struct omap_hwmod *oh);
|
|
struct omap_hwmod *omap_hwmod_lookup(const char *name);
|
|
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
|
|
int omap_hwmod_late_init(void);
|
|
|
|
int omap_hwmod_enable(struct omap_hwmod *oh);
|
|
int omap_hwmod_idle(struct omap_hwmod *oh);
|
|
int omap_hwmod_shutdown(struct omap_hwmod *oh);
|
|
|
|
int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
|
|
int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
|
|
|
|
int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
|
|
|
|
int omap_hwmod_reset(struct omap_hwmod *oh);
|
|
void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
|
|
|
|
void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
|
|
u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
|
|
|
|
int omap_hwmod_count_resources(struct omap_hwmod *oh);
|
|
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
|
|
|
|
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
|
|
|
|
int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
|
|
struct omap_hwmod *init_oh);
|
|
int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
|
|
struct omap_hwmod *init_oh);
|
|
|
|
int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
|
|
int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
|
|
int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
|
|
int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
|
|
|
|
int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
|
|
int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
|
|
|
|
int omap_hwmod_for_each_by_class(const char *classname,
|
|
int (*fn)(struct omap_hwmod *oh,
|
|
void *user),
|
|
void *user);
|
|
|
|
/*
|
|
* Chip variant-specific hwmod init routines - XXX should be converted
|
|
* to use initcalls once the initial boot ordering is straightened out
|
|
*/
|
|
extern int omap2420_hwmod_init(void);
|
|
extern int omap2430_hwmod_init(void);
|
|
extern int omap3xxx_hwmod_init(void);
|
|
|
|
#endif
|