1c9cf6f986
We are currently reserving one byte more than actually needed by the flash device and overlapping into the next I/O expansion bus window. This a) causes us to allocate an extra page of VM due to ARM ioremap() alignment code and b) could cause problems if another driver tries to request the next expansion bus window. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
187 lines
4.5 KiB
C
187 lines
4.5 KiB
C
/*
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* arch/arm/mach-ixp4xx/ixdp425-setup.c
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*
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* IXDP425/IXCDP1100 board-setup
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*
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* Copyright (C) 2003-2005 MontaVista Software, Inc.
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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void __init ixdp425_map_io(void)
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{
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ixp4xx_map_io();
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}
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static struct flash_platform_data ixdp425_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource ixdp425_flash_resource = {
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.start = IXDP425_FLASH_BASE,
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.end = IXDP425_FLASH_BASE + IXDP425_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device ixdp425_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = &ixdp425_flash_data,
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},
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.num_resources = 1,
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.resource = &ixdp425_flash_resource,
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};
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static struct ixp4xx_i2c_pins ixdp425_i2c_gpio_pins = {
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.sda_pin = IXDP425_SDA_PIN,
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.scl_pin = IXDP425_SCL_PIN,
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};
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static struct platform_device ixdp425_i2c_controller = {
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.name = "IXP4XX-I2C",
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.id = 0,
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.dev = {
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.platform_data = &ixdp425_i2c_gpio_pins,
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},
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.num_resources = 0
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};
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static struct resource ixdp425_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM
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}
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};
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static struct plat_serial8250_port ixdp425_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ },
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};
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static struct platform_device ixdp425_uart = {
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.name = "serial8250",
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.id = 0,
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.dev.platform_data = ixdp425_uart_data,
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.num_resources = 2,
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.resource = ixdp425_uart_resources
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};
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static struct platform_device *ixdp425_devices[] __initdata = {
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&ixdp425_i2c_controller,
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&ixdp425_flash,
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&ixdp425_uart
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};
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static void __init ixdp425_init(void)
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{
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ixp4xx_sys_init();
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/*
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* IXP465 has 32MB window
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*/
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if (machine_is_ixdp465()) {
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ixdp425_flash_resource.end += IXDP425_FLASH_SIZE;
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}
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platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
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}
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MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
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/* Maintainer: MontaVista Software, Inc. */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixdp425_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = ixdp425_init,
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MACHINE_END
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MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
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/* Maintainer: MontaVista Software, Inc. */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixdp425_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = ixdp425_init,
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MACHINE_END
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MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
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/* Maintainer: MontaVista Software, Inc. */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixdp425_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = ixdp425_init,
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MACHINE_END
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/*
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* Avila is functionally equivalent to IXDP425 except that it adds
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* a CF IDE slot hanging off the expansion bus. When we have a
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* driver for IXP4xx CF IDE with driver model support we'll move
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* Avila to it's own setup file.
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*/
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#ifdef CONFIG_ARCH_AVILA
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MACHINE_START(AVILA, "Gateworks Avila Network Platform")
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/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixdp425_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = ixdp425_init,
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MACHINE_END
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#endif
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