ebf3a65092
The PCI bridge representing the PCIE root complex on Axon, contains device BARs for a memory range and ROM that define inbound accesses. This confuses the kernel resource management code -- the resources need to be hidden when Axon is a host bridge. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org> |
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| .. | ||
| spufs | ||
| axon_msi.c | ||
| cbe_cpufreq_pervasive.c | ||
| cbe_cpufreq_pmi.c | ||
| cbe_cpufreq.c | ||
| cbe_cpufreq.h | ||
| cbe_regs.c | ||
| cbe_thermal.c | ||
| interrupt.c | ||
| interrupt.h | ||
| io-workarounds.c | ||
| iommu.c | ||
| Kconfig | ||
| Makefile | ||
| pervasive.c | ||
| pervasive.h | ||
| pmu.c | ||
| ras.c | ||
| ras.h | ||
| setup.c | ||
| smp.c | ||
| spider-pic.c | ||
| spu_base.c | ||
| spu_callbacks.c | ||
| spu_fault.c | ||
| spu_manage.c | ||
| spu_notify.c | ||
| spu_priv1_mmio.c | ||
| spu_priv1_mmio.h | ||
| spu_syscalls.c | ||