f0a8548bc1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
58 lines
1.5 KiB
Plaintext
58 lines
1.5 KiB
Plaintext
* Oxford Semiconductor OXNAS SoC Family Pin Controller
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Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
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../interrupt-controller/interrupts.txt for generic information regarding
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pin controller, GPIO, and interrupt bindings.
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OXNAS 'pin configuration node' is a node of a group of pins which can be
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used for a specific device or function. This node represents configurations of
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pins, optional function, and optional mux related configuration.
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Required properties for pin controller node:
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- compatible: "oxsemi,ox810se-pinctrl" or "oxsemi,ox820-pinctrl"
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- oxsemi,sys-ctrl: a phandle to the system controller syscon node
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Required properties for pin configuration sub-nodes:
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- pins: List of pins to which the configuration applies.
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Optional properties for pin configuration sub-nodes:
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----------------------------------------------------
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- function: Mux function for the specified pins.
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- bias-pull-up: Enable weak pull-up.
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Example:
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pinctrl: pinctrl {
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compatible = "oxsemi,ox810se-pinctrl";
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/* Regmap for sys registers */
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oxsemi,sys-ctrl = <&sys>;
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pinctrl_uart2: pinctrl_uart2 {
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uart2a {
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pins = "gpio31";
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function = "fct3";
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};
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uart2b {
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pins = "gpio32";
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function = "fct3";
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};
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};
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};
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uart2: serial@900000 {
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compatible = "ns16550a";
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reg = <0x900000 0x100000>;
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clocks = <&sysclk>;
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interrupts = <29>;
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reg-shift = <0>;
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fifo-size = <16>;
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reg-io-width = <1>;
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current-speed = <115200>;
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no-loopback-test;
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status = "disabled";
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resets = <&reset 22>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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};
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