c0b12422e5
The following patch ensures that the correct error interrupt handling routine is initialized. This patch is based on the 2.6.12 ia64 release tree. Signed-off-by: Colin Ngam <cngam@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
472 lines
12 KiB
C
472 lines
12 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/bootmem.h>
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#include <linux/nodemask.h>
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#include <asm/sn/types.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/pcibus_provider_defs.h>
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#include <asm/sn/pcidev.h>
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#include "pci/pcibr_provider.h"
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#include "xtalk/xwidgetdev.h"
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#include <asm/sn/geo.h>
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#include "xtalk/hubdev.h"
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#include <asm/sn/io.h>
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#include <asm/sn/simulator.h>
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#include <asm/sn/tioca_provider.h>
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char master_baseio_wid;
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nasid_t master_nasid = INVALID_NASID; /* Partition Master */
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struct slab_info {
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struct hubdev_info hubdev;
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};
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struct brick {
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moduleid_t id; /* Module ID of this module */
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struct slab_info slab_info[MAX_SLABS + 1];
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};
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int sn_ioif_inited = 0; /* SN I/O infrastructure initialized? */
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struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
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/*
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* Hooks and struct for unsupported pci providers
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*/
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static dma_addr_t
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sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size)
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{
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return 0;
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}
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static void
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sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction)
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{
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return;
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}
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static void *
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sn_default_pci_bus_fixup(struct pcibus_bussoft *soft)
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{
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return NULL;
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}
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static struct sn_pcibus_provider sn_pci_default_provider = {
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.dma_map = sn_default_pci_map,
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.dma_map_consistent = sn_default_pci_map,
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.dma_unmap = sn_default_pci_unmap,
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.bus_fixup = sn_default_pci_bus_fixup,
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};
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/*
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* Retrieve the DMA Flush List given nasid. This list is needed
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* to implement the WAR - Flush DMA data on PIO Reads.
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*/
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static inline uint64_t
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sal_get_widget_dmaflush_list(u64 nasid, u64 widget_num, u64 address)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
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(u64) nasid, (u64) widget_num, (u64) address, 0, 0, 0,
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0);
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return ret_stuff.v0;
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}
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/*
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* Retrieve the hub device info structure for the given nasid.
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*/
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static inline uint64_t sal_get_hubdev_info(u64 handle, u64 address)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
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(u64) handle, (u64) address, 0, 0, 0, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* Retrieve the pci bus information given the bus number.
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*/
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static inline uint64_t sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
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(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* Retrieve the pci device information given the bus and device|function number.
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*/
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static inline uint64_t
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sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
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u64 sn_irq_info)
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{
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struct ia64_sal_retval ret_stuff;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
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(u64) segment, (u64) bus_number, (u64) devfn,
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(u64) pci_dev,
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sn_irq_info, 0, 0);
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return ret_stuff.v0;
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}
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/*
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* sn_alloc_pci_sysdata() - This routine allocates a pci controller
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* which is expected as the pci_dev and pci_bus sysdata by the Linux
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* PCI infrastructure.
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*/
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static inline struct pci_controller *sn_alloc_pci_sysdata(void)
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{
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struct pci_controller *pci_sysdata;
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pci_sysdata = kmalloc(sizeof(*pci_sysdata), GFP_KERNEL);
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if (!pci_sysdata)
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BUG();
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memset(pci_sysdata, 0, sizeof(*pci_sysdata));
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return pci_sysdata;
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}
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/*
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* sn_fixup_ionodes() - This routine initializes the HUB data strcuture for
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* each node in the system.
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*/
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static void sn_fixup_ionodes(void)
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{
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struct sn_flush_device_list *sn_flush_device_list;
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struct hubdev_info *hubdev;
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uint64_t status;
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uint64_t nasid;
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int i, widget;
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for (i = 0; i < numionodes; i++) {
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hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
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nasid = cnodeid_to_nasid(i);
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status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev));
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if (status)
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continue;
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/* Attach the error interrupt handlers */
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if (nasid & 1)
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ice_error_init(hubdev);
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else
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hub_error_init(hubdev);
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for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++)
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hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev;
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if (!hubdev->hdi_flush_nasid_list.widget_p)
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continue;
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hubdev->hdi_flush_nasid_list.widget_p =
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kmalloc((HUB_WIDGET_ID_MAX + 1) *
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sizeof(struct sn_flush_device_list *), GFP_KERNEL);
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memset(hubdev->hdi_flush_nasid_list.widget_p, 0x0,
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(HUB_WIDGET_ID_MAX + 1) *
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sizeof(struct sn_flush_device_list *));
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for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) {
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sn_flush_device_list = kmalloc(DEV_PER_WIDGET *
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sizeof(struct
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sn_flush_device_list),
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GFP_KERNEL);
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memset(sn_flush_device_list, 0x0,
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DEV_PER_WIDGET *
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sizeof(struct sn_flush_device_list));
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status =
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sal_get_widget_dmaflush_list(nasid, widget,
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(uint64_t)
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__pa
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(sn_flush_device_list));
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if (status) {
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kfree(sn_flush_device_list);
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continue;
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}
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hubdev->hdi_flush_nasid_list.widget_p[widget] =
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sn_flush_device_list;
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}
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}
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}
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/*
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* sn_pci_fixup_slot() - This routine sets up a slot's resources
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* consistent with the Linux PCI abstraction layer. Resources acquired
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* from our PCI provider include PIO maps to BAR space and interrupt
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* objects.
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*/
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static void sn_pci_fixup_slot(struct pci_dev *dev)
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{
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int idx;
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int segment = 0;
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uint64_t size;
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struct sn_irq_info *sn_irq_info;
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struct pci_dev *host_pci_dev;
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int status = 0;
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struct pcibus_bussoft *bs;
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dev->sysdata = kmalloc(sizeof(struct pcidev_info), GFP_KERNEL);
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if (SN_PCIDEV_INFO(dev) <= 0)
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BUG(); /* Cannot afford to run out of memory */
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memset(SN_PCIDEV_INFO(dev), 0, sizeof(struct pcidev_info));
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sn_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
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if (sn_irq_info <= 0)
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BUG(); /* Cannot afford to run out of memory */
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memset(sn_irq_info, 0, sizeof(struct sn_irq_info));
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/* Call to retrieve pci device information needed by kernel. */
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status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number,
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dev->devfn,
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(u64) __pa(SN_PCIDEV_INFO(dev)),
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(u64) __pa(sn_irq_info));
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if (status)
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BUG(); /* Cannot get platform pci device information information */
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/* Copy over PIO Mapped Addresses */
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for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
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unsigned long start, end, addr;
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if (!SN_PCIDEV_INFO(dev)->pdi_pio_mapped_addr[idx])
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continue;
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start = dev->resource[idx].start;
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end = dev->resource[idx].end;
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size = end - start;
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addr = SN_PCIDEV_INFO(dev)->pdi_pio_mapped_addr[idx];
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addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
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dev->resource[idx].start = addr;
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dev->resource[idx].end = addr + size;
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if (dev->resource[idx].flags & IORESOURCE_IO)
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dev->resource[idx].parent = &ioport_resource;
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else
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dev->resource[idx].parent = &iomem_resource;
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}
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/* set up host bus linkages */
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bs = SN_PCIBUS_BUSSOFT(dev->bus);
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host_pci_dev =
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pci_find_slot(SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32,
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SN_PCIDEV_INFO(dev)->
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pdi_slot_host_handle & 0xffffffff);
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SN_PCIDEV_INFO(dev)->pdi_host_pcidev_info =
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SN_PCIDEV_INFO(host_pci_dev);
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SN_PCIDEV_INFO(dev)->pdi_linux_pcidev = dev;
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SN_PCIDEV_INFO(dev)->pdi_pcibus_info = bs;
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if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) {
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SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type];
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} else {
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SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider;
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}
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/* Only set up IRQ stuff if this device has a host bus context */
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if (bs && sn_irq_info->irq_irq) {
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SN_PCIDEV_INFO(dev)->pdi_sn_irq_info = sn_irq_info;
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dev->irq = SN_PCIDEV_INFO(dev)->pdi_sn_irq_info->irq_irq;
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sn_irq_fixup(dev, sn_irq_info);
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}
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}
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/*
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* sn_pci_controller_fixup() - This routine sets up a bus's resources
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* consistent with the Linux PCI abstraction layer.
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*/
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static void sn_pci_controller_fixup(int segment, int busnum)
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{
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int status = 0;
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int nasid, cnode;
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struct pci_bus *bus;
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struct pci_controller *controller;
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struct pcibus_bussoft *prom_bussoft_ptr;
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struct hubdev_info *hubdev_info;
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void *provider_soft;
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struct sn_pcibus_provider *provider;
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status =
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sal_get_pcibus_info((u64) segment, (u64) busnum,
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(u64) ia64_tpa(&prom_bussoft_ptr));
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if (status > 0) {
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return; /* bus # does not exist */
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}
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prom_bussoft_ptr = __va(prom_bussoft_ptr);
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controller = sn_alloc_pci_sysdata();
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/* controller non-zero is BUG'd in sn_alloc_pci_sysdata */
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bus = pci_scan_bus(busnum, &pci_root_ops, controller);
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if (bus == NULL) {
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return; /* error, or bus already scanned */
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}
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/*
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* Per-provider fixup. Copies the contents from prom to local
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* area and links SN_PCIBUS_BUSSOFT().
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*/
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if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) {
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return; /* unsupported asic type */
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}
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provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type];
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if (provider == NULL) {
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return; /* no provider registerd for this asic */
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}
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provider_soft = NULL;
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if (provider->bus_fixup) {
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provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr);
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}
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if (provider_soft == NULL) {
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return; /* fixup failed or not applicable */
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}
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/*
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* Generic bus fixup goes here. Don't reference prom_bussoft_ptr
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* after this point.
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*/
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bus->sysdata = controller;
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PCI_CONTROLLER(bus)->platform_data = provider_soft;
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nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base);
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cnode = nasid_to_cnodeid(nasid);
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hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
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SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info =
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&(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]);
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}
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/*
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* Ugly hack to get PCI setup until we have a proper ACPI namespace.
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*/
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#define PCI_BUSES_TO_SCAN 256
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static int __init sn_pci_init(void)
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{
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int i = 0;
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struct pci_dev *pci_dev = NULL;
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extern void sn_init_cpei_timer(void);
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#ifdef CONFIG_PROC_FS
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extern void register_sn_procfs(void);
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#endif
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if (!ia64_platform_is("sn2") || IS_RUNNING_ON_SIMULATOR())
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return 0;
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/*
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* prime sn_pci_provider[]. Individial provider init routines will
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* override their respective default entries.
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*/
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for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++)
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sn_pci_provider[i] = &sn_pci_default_provider;
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pcibr_init_provider();
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tioca_init_provider();
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/*
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* This is needed to avoid bounce limit checks in the blk layer
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*/
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ia64_max_iommu_merge_mask = ~PAGE_MASK;
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sn_fixup_ionodes();
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sn_irq = kmalloc(sizeof(struct sn_irq_info *) * NR_IRQS, GFP_KERNEL);
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if (sn_irq <= 0)
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BUG(); /* Canno afford to run out of memory. */
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memset(sn_irq, 0, sizeof(struct sn_irq_info *) * NR_IRQS);
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sn_init_cpei_timer();
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#ifdef CONFIG_PROC_FS
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register_sn_procfs();
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#endif
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for (i = 0; i < PCI_BUSES_TO_SCAN; i++) {
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sn_pci_controller_fixup(0, i);
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}
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/*
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* Generic Linux PCI Layer has created the pci_bus and pci_dev
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* structures - time for us to add our SN PLatform specific
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* information.
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*/
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while ((pci_dev =
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pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
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sn_pci_fixup_slot(pci_dev);
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}
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sn_ioif_inited = 1; /* sn I/O infrastructure now initialized */
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return 0;
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}
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/*
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* hubdev_init_node() - Creates the HUB data structure and link them to it's
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* own NODE specific data area.
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*/
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void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
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{
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struct hubdev_info *hubdev_info;
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if (node >= num_online_nodes()) /* Headless/memless IO nodes */
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hubdev_info =
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(struct hubdev_info *)alloc_bootmem_node(NODE_DATA(0),
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sizeof(struct
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hubdev_info));
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else
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hubdev_info =
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(struct hubdev_info *)alloc_bootmem_node(NODE_DATA(node),
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sizeof(struct
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hubdev_info));
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npda->pdinfo = (void *)hubdev_info;
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}
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geoid_t
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cnodeid_get_geoid(cnodeid_t cnode)
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{
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struct hubdev_info *hubdev;
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hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
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return hubdev->hdi_geoid;
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}
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subsys_initcall(sn_pci_init);
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