5fb7dc37dc
per cpu data section contains two types of data. One set which is exclusively accessed by the local cpu and the other set which is per cpu, but also shared by remote cpus. In the current kernel, these two sets are not clearely separated out. This can potentially cause the same data cacheline shared between the two sets of data, which will result in unnecessary bouncing of the cacheline between cpus. One way to fix the problem is to cacheline align the remotely accessed per cpu data, both at the beginning and at the end. Because of the padding at both ends, this will likely cause some memory wastage and also the interface to achieve this is not clean. This patch: Moves the remotely accessed per cpu data (which is currently marked as ____cacheline_aligned_in_smp) into a different section, where all the data elements are cacheline aligned. And as such, this differentiates the local only data and remotely accessed data cleanly. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Christoph Lameter <clameter@sgi.com> Cc: <linux-arch@vger.kernel.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
182 lines
5.3 KiB
ArmAsm
182 lines
5.3 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* arch/sh5/vmlinux.lds.S
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*
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* ld script to make ST50 Linux kernel
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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*
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* benedict.gaster@superh.com: 2nd May 2002
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* Add definition of empty_zero_page to be the first page of kernel image.
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*
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* benedict.gaster@superh.com: 3rd May 2002
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* Added support for ramdisk, removing statically linked romfs at the same time.
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*
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* lethal@linux-sh.org: 9th May 2003
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* Kill off GLOBAL_NAME() usage and other CDC-isms.
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*
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* lethal@linux-sh.org: 19th May 2003
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* Remove support for ancient toolchains.
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*/
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/processor.h>
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#include <asm/thread_info.h>
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#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET
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#include <asm-generic/vmlinux.lds.h>
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#ifdef NOTDEF
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#ifdef CONFIG_LITTLE_ENDIAN
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OUTPUT_FORMAT("elf32-sh64l-linux", "elf32-sh64l-linux", "elf32-sh64l-linux")
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#else
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OUTPUT_FORMAT("elf32-sh64", "elf32-sh64", "elf32-sh64")
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#endif
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#endif
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OUTPUT_ARCH(sh:sh5)
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#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
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ENTRY(__start)
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SECTIONS
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{
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. = CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE;
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_text = .; /* Text and read-only data */
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text = .; /* Text and read-only data */
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.empty_zero_page : C_PHYS(.empty_zero_page) {
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*(.empty_zero_page)
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} = 0
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.text : C_PHYS(.text) {
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TEXT_TEXT
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*(.text64)
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*(.text..SHmedia32)
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SCHED_TEXT
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LOCK_TEXT
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*(.fixup)
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*(.gnu.warning)
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#ifdef CONFIG_LITTLE_ENDIAN
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} = 0x6ff0fff0
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#else
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} = 0xf0fff06f
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#endif
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/* We likely want __ex_table to be Cache Line aligned */
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. = ALIGN(L1_CACHE_BYTES); /* Exception table */
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__start___ex_table = .;
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__ex_table : C_PHYS(__ex_table) { *(__ex_table) }
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__stop___ex_table = .;
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RODATA
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_etext = .; /* End of text section */
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.data : C_PHYS(.data) { /* Data */
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DATA_DATA
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CONSTRUCTORS
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}
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. = ALIGN(PAGE_SIZE);
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.data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) }
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. = ALIGN(PAGE_SIZE);
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__per_cpu_start = .;
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.data.percpu : C_PHYS(.data.percpu) {
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*(.data.percpu)
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*(.data.percpu.shared_aligned)
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}
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__per_cpu_end = . ;
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.data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) }
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_edata = .; /* End of data section */
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. = ALIGN(THREAD_SIZE); /* init_task: structure size aligned */
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.data.init_task : C_PHYS(.data.init_task) { *(.data.init_task) }
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. = ALIGN(PAGE_SIZE); /* Init code and data */
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__init_begin = .;
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_sinittext = .;
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.init.text : C_PHYS(.init.text) { *(.init.text) }
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_einittext = .;
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.init.data : C_PHYS(.init.data) { *(.init.data) }
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. = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */
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__setup_start = .;
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.init.setup : C_PHYS(.init.setup) { *(.init.setup) }
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__setup_end = .;
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__initcall_start = .;
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.initcall.init : C_PHYS(.initcall.init) {
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INITCALLS
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}
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__initcall_end = .;
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__con_initcall_start = .;
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.con_initcall.init : C_PHYS(.con_initcall.init) { *(.con_initcall.init) }
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__con_initcall_end = .;
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SECURITY_INIT
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#ifdef CONFIG_BLK_DEV_INITRD
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__initramfs_start = .;
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.init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) }
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__initramfs_end = .;
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#endif
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/* Align to the biggest single data representation, head and tail */
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. = ALIGN(8);
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__bss_start = .; /* BSS */
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.bss : C_PHYS(.bss) {
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*(.bss)
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}
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. = ALIGN(8);
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_end = . ;
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/* Sections to be discarded */
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/DISCARD/ : {
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*(.exit.text)
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*(.exit.data)
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*(.exitcall.exit)
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}
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/* Stabs debugging sections. */
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.stab 0 : C_PHYS(.stab) { *(.stab) }
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.stabstr 0 : C_PHYS(.stabstr) { *(.stabstr) }
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.stab.excl 0 : C_PHYS(.stab.excl) { *(.stab.excl) }
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.stab.exclstr 0 : C_PHYS(.stab.exclstr) { *(.stab.exclstr) }
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.stab.index 0 : C_PHYS(.stab.index) { *(.stab.index) }
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.stab.indexstr 0 : C_PHYS(.stab.indexstr) { *(.stab.indexstr) }
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.comment 0 : C_PHYS(.comment) { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging section are relative to the beginning
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of the section so we begin .debug at 0. */
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/* DWARF 1 */
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.debug 0 : C_PHYS(.debug) { *(.debug) }
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.line 0 : C_PHYS(.line) { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : C_PHYS(.debug_srcinfo) { *(.debug_srcinfo) }
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.debug_sfnames 0 : C_PHYS(.debug_sfnames) { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : C_PHYS(.debug_aranges) { *(.debug_aranges) }
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.debug_pubnames 0 : C_PHYS(.debug_pubnames) { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : C_PHYS(.debug_info) { *(.debug_info) }
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.debug_abbrev 0 : C_PHYS(.debug_abbrev) { *(.debug_abbrev) }
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.debug_line 0 : C_PHYS(.debug_line) { *(.debug_line) }
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.debug_frame 0 : C_PHYS(.debug_frame) { *(.debug_frame) }
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.debug_str 0 : C_PHYS(.debug_str) { *(.debug_str) }
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.debug_loc 0 : C_PHYS(.debug_loc) { *(.debug_loc) }
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.debug_macinfo 0 : C_PHYS(.debug_macinfo) { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : C_PHYS(.debug_weaknames) { *(.debug_weaknames) }
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.debug_funcnames 0 : C_PHYS(.debug_funcnames) { *(.debug_funcnames) }
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.debug_typenames 0 : C_PHYS(.debug_typenames) { *(.debug_typenames) }
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.debug_varnames 0 : C_PHYS(.debug_varnames) { *(.debug_varnames) }
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/* These must appear regardless of . */
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}
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