c4bce90ea2
Yes, you heard it right, they changed the PTE layout for SUN4V. Ho hum... This is the simple and inefficient way to support this. It'll get optimized, don't worry. Signed-off-by: David S. Miller <davem@davemloft.net>
324 lines
11 KiB
C
324 lines
11 KiB
C
/* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
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* pgtable.h: SpitFire page table operations.
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*
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* Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
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* Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#ifndef _SPARC64_PGTABLE_H
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#define _SPARC64_PGTABLE_H
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/* This file contains the functions and defines necessary to modify and use
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* the SpitFire page tables.
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*/
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#include <asm-generic/pgtable-nopud.h>
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#include <linux/config.h>
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#include <linux/compiler.h>
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#include <asm/types.h>
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#include <asm/spitfire.h>
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#include <asm/asi.h>
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#include <asm/system.h>
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#include <asm/page.h>
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#include <asm/processor.h>
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#include <asm/const.h>
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/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB).
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* The page copy blockops can use 0x2000000 to 0x4000000.
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* The TSB is mapped in the 0x4000000 to 0x6000000 range.
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* The PROM resides in an area spanning 0xf0000000 to 0x100000000.
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* The vmalloc area spans 0x100000000 to 0x200000000.
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* Since modules need to be in the lowest 32-bits of the address space,
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* we place them right before the OBP area from 0x10000000 to 0xf0000000.
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* There is a single static kernel PMD which maps from 0x0 to address
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* 0x400000000.
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*/
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#define TLBTEMP_BASE _AC(0x0000000002000000,UL)
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#define TSBMAP_BASE _AC(0x0000000004000000,UL)
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#define MODULES_VADDR _AC(0x0000000010000000,UL)
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#define MODULES_LEN _AC(0x00000000e0000000,UL)
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#define MODULES_END _AC(0x00000000f0000000,UL)
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#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
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#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
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#define VMALLOC_START _AC(0x0000000100000000,UL)
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#define VMALLOC_END _AC(0x0000000200000000,UL)
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/* XXX All of this needs to be rethought so we can take advantage
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* XXX cheetah's full 64-bit virtual address space, ie. no more hole
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* XXX in the middle like on spitfire. -DaveM
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*/
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/*
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* Given a virtual address, the lowest PAGE_SHIFT bits determine offset
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* into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
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* in the proper pagetable (the -3 is from the 8 byte ptes, and each page
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* table is a single page long). The next higher PMD_BITS determine pmd#
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* in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
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* since the pmd entries are 4 bytes, and each pmd page is a single page
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* long). Finally, the higher few bits determine pgde#.
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*/
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/* PMD_SHIFT determines the size of the area a second-level page
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* table can map
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*/
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#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
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#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PMD_BITS (PAGE_SHIFT - 2)
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/* PGDIR_SHIFT determines what a third-level page table entry can map */
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#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
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#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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#define PGDIR_BITS (PAGE_SHIFT - 2)
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#ifndef __ASSEMBLY__
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#include <linux/sched.h>
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/* Entries per page directory level. */
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#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
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#define PTRS_PER_PMD (1UL << PMD_BITS)
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#define PTRS_PER_PGD (1UL << PGDIR_BITS)
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/* Kernel has a separate 44bit address space. */
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#define FIRST_USER_ADDRESS 0
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#define pte_ERROR(e) __builtin_trap()
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#define pmd_ERROR(e) __builtin_trap()
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#define pgd_ERROR(e) __builtin_trap()
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#endif /* !(__ASSEMBLY__) */
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/* PTE bits which are the same in SUN4U and SUN4V format. */
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#define _PAGE_VALID 0x8000000000000000 /* Valid TTE */
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#define _PAGE_R 0x8000000000000000 /* Keep ref bit up to date*/
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/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
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#define __P000 __pgprot(0)
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#define __P001 __pgprot(0)
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#define __P010 __pgprot(0)
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#define __P011 __pgprot(0)
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#define __P100 __pgprot(0)
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#define __P101 __pgprot(0)
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#define __P110 __pgprot(0)
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#define __P111 __pgprot(0)
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#define __S000 __pgprot(0)
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#define __S001 __pgprot(0)
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#define __S010 __pgprot(0)
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#define __S011 __pgprot(0)
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#define __S100 __pgprot(0)
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#define __S101 __pgprot(0)
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#define __S110 __pgprot(0)
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#define __S111 __pgprot(0)
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#ifndef __ASSEMBLY__
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extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long);
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extern unsigned long pte_sz_bits(unsigned long size);
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extern pgprot_t PAGE_KERNEL;
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extern pgprot_t PAGE_KERNEL_LOCKED;
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extern pgprot_t PAGE_COPY;
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/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */
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extern unsigned long _PAGE_IE;
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extern unsigned long _PAGE_E;
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extern unsigned long _PAGE_CACHE;
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extern unsigned long pg_iobits;
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extern unsigned long _PAGE_ALL_SZ_BITS;
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extern unsigned long _PAGE_SZBITS;
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extern unsigned long phys_base;
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extern unsigned long pfn_base;
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extern struct page *mem_map_zero;
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#define ZERO_PAGE(vaddr) (mem_map_zero)
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/* PFNs are real physical page numbers. However, mem_map only begins to record
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* per-page information starting at pfn_base. This is to handle systems where
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* the first physical page in the machine is at some huge physical address,
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* such as 4GB. This is common on a partitioned E10000, for example.
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*/
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extern pte_t pfn_pte(unsigned long, pgprot_t);
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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extern unsigned long pte_pfn(pte_t);
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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extern pte_t pte_modify(pte_t, pgprot_t);
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#define pmd_set(pmdp, ptep) \
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(pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
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#define pud_set(pudp, pmdp) \
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(pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
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#define __pmd_page(pmd) \
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((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
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#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
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#define pud_page(pud) \
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((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
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#define pmd_none(pmd) (!pmd_val(pmd))
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#define pmd_bad(pmd) (0)
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#define pmd_present(pmd) (pmd_val(pmd) != 0U)
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#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
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#define pud_none(pud) (!pud_val(pud))
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#define pud_bad(pud) (0)
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#define pud_present(pud) (pud_val(pud) != 0U)
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#define pud_clear(pudp) (pud_val(*(pudp)) = 0U)
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/* Same in both SUN4V and SUN4U. */
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#define pte_none(pte) (!pte_val(pte))
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extern unsigned long pte_present(pte_t);
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/* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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extern unsigned long pte_read(pte_t);
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extern unsigned long pte_exec(pte_t);
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extern unsigned long pte_write(pte_t);
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extern unsigned long pte_dirty(pte_t);
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extern unsigned long pte_young(pte_t);
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extern pte_t pte_wrprotect(pte_t);
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extern pte_t pte_rdprotect(pte_t);
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extern pte_t pte_mkclean(pte_t);
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extern pte_t pte_mkold(pte_t);
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/* Be very careful when you change these three, they are delicate. */
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extern pte_t pte_mkyoung(pte_t);
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extern pte_t pte_mkwrite(pte_t);
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extern pte_t pte_mkdirty(pte_t);
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extern pte_t pte_mkhuge(pte_t);
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/* to find an entry in a page-table-directory. */
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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/* to find an entry in a kernel page-table-directory */
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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/* Find an entry in the second-level page table.. */
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#define pmd_offset(pudp, address) \
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((pmd_t *) pud_page(*(pudp)) + \
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(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
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/* Find an entry in the third-level page table.. */
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#define pte_index(dir, address) \
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((pte_t *) __pmd_page(*(dir)) + \
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((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
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#define pte_offset_kernel pte_index
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#define pte_offset_map pte_index
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#define pte_offset_map_nested pte_index
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#define pte_unmap(pte) do { } while (0)
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#define pte_unmap_nested(pte) do { } while (0)
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/* Actual page table PTE updates. */
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extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig);
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static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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{
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pte_t orig = *ptep;
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*ptep = pte;
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/* It is more efficient to let flush_tlb_kernel_range()
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* handle init_mm tlb flushes.
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*
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* SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
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* and SUN4V pte layout, so this inline test is fine.
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*/
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if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
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tlb_batch_add(mm, addr, ptep, orig);
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}
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#define pte_clear(mm,addr,ptep) \
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set_pte_at((mm), (addr), (ptep), __pte(0UL))
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extern pgd_t swapper_pg_dir[2048];
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extern pmd_t swapper_low_pmd_dir[2048];
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extern void paging_init(void);
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extern unsigned long find_ecache_flush_span(unsigned long size);
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/* These do nothing with the way I have things setup. */
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#define mmu_lockarea(vaddr, len) (vaddr)
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#define mmu_unlockarea(vaddr, len) do { } while(0)
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struct vm_area_struct;
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extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
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/* Encode and de-code a swap entry */
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#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
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#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
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#define __swp_entry(type, offset) \
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( (swp_entry_t) \
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{ \
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(((long)(type) << PAGE_SHIFT) | \
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((long)(offset) << (PAGE_SHIFT + 8UL))) \
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} )
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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/* File offset in PTE support. */
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extern unsigned long pte_file(pte_t);
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#define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT)
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extern pte_t pgoff_to_pte(unsigned long);
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#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
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extern unsigned long prom_virt_to_phys(unsigned long, int *);
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extern unsigned long sun4u_get_pte(unsigned long);
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static inline unsigned long __get_phys(unsigned long addr)
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{
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return sun4u_get_pte(addr);
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}
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static inline int __get_iospace(unsigned long addr)
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{
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return ((sun4u_get_pte(addr) & 0xf0000000) >> 28);
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}
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extern unsigned long *sparc64_valid_addr_bitmap;
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/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
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#define kern_addr_valid(addr) \
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(test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
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extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
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unsigned long pfn,
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unsigned long size, pgprot_t prot);
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/* Clear virtual and physical cachability, set side-effect bit. */
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extern pgprot_t pgprot_noncached(pgprot_t);
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/*
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* For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
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* its high 4 bits. These macros/functions put it there or get it from there.
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*/
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#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
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#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
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#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
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#include <asm-generic/pgtable.h>
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/* We provide our own get_unmapped_area to cope with VA holes for userland */
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#define HAVE_ARCH_UNMAPPED_AREA
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/* We provide a special get_unmapped_area for framebuffer mmaps to try and use
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* the largest alignment possible such that larget PTEs can be used.
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*/
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extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
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unsigned long, unsigned long,
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unsigned long);
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#define HAVE_ARCH_FB_UNMAPPED_AREA
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extern void pgtable_cache_init(void);
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extern void sun4v_register_fault_status(void);
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extern void sun4v_ktsb_register(void);
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#endif /* !(__ASSEMBLY__) */
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#endif /* !(_SPARC64_PGTABLE_H) */
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