c37b5efea4
On cpu's supporting xsave/xrstor, fpstate pointer in the sigcontext, will include the extended state information along with fpstate information. Presence of extended state information is indicated by the presence of FP_XSTATE_MAGIC1 at fpstate.sw_reserved.magic1 and FP_XSTATE_MAGIC2 at fpstate + (fpstate.sw_reserved.extended_size - FP_XSTATE_MAGIC2_SIZE). Extended feature bit mask that is saved in the memory layout is represented by the fpstate.sw_reserved.xstate_bv For RT signal frames, UC_FP_XSTATE in the uc_flags also indicate the presence of extended state information in the sigcontext's fpstate pointer. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
#ifndef __ASM_X86_XSAVE_H
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#define __ASM_X86_XSAVE_H
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#include <asm/processor.h>
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#include <asm/i387.h>
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#define XSTATE_FP 0x1
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#define XSTATE_SSE 0x2
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#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
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#define FXSAVE_SIZE 512
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/*
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* These are the features that the OS can handle currently.
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*/
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#define XCNTXT_LMASK (XSTATE_FP | XSTATE_SSE)
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#define XCNTXT_HMASK 0x0
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#ifdef CONFIG_X86_64
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#define REX_PREFIX "0x48, "
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#else
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#define REX_PREFIX
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#endif
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extern unsigned int xstate_size, pcntxt_hmask, pcntxt_lmask;
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extern struct xsave_struct *init_xstate_buf;
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extern void xsave_cntxt_init(void);
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extern void xsave_init(void);
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extern int init_fpu(struct task_struct *child);
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extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
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void __user *fpstate,
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struct _fpx_sw_bytes *sw);
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static inline int xrstor_checking(struct xsave_struct *fx)
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{
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int err;
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asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
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: "memory");
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return err;
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}
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static inline int xsave_user(struct xsave_struct __user *buf)
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{
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int err;
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__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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".section __ex_table,\"a\"\n"
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_ASM_ALIGN "\n"
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_ASM_PTR "1b,3b\n"
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".previous"
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: [err] "=r" (err)
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: "D" (buf), "a" (-1), "d" (-1), "0" (0)
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: "memory");
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if (unlikely(err) && __clear_user(buf, xstate_size))
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err = -EFAULT;
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/* No need to clear here because the caller clears USED_MATH */
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return err;
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}
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static inline int xrestore_user(struct xsave_struct __user *buf,
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unsigned int lmask,
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unsigned int hmask)
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{
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int err;
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struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
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__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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".section __ex_table,\"a\"\n"
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_ASM_ALIGN "\n"
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_ASM_PTR "1b,3b\n"
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".previous"
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: [err] "=r" (err)
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: "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
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: "memory"); /* memory required? */
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return err;
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}
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static inline void xrstor_state(struct xsave_struct *fx, int lmask, int hmask)
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{
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asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
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: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
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: "memory");
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}
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static inline void xsave(struct task_struct *tsk)
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{
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/* This, however, we can work around by forcing the compiler to select
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an addressing mode that doesn't require extended registers. */
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__asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
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: : "D" (&(tsk->thread.xstate->xsave)),
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"a" (-1), "d"(-1) : "memory");
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}
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#endif
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