c1e30ad98f
Many interrupts that share a single mask source but are on different hardware vectors will have an associated register tied to an INTEVT that denotes the precise cause for the interrupt exception being triggered. This introduces the concept of IRQ subgroups in the intc core, where a virtual IRQ map is constructed for each of the pre-defined cause bits, and a higher level chained handler takes control of the parent INTEVT. This enables CPUs with heavily muxed IRQ vectors (especially across disjoint blocks) to break things out in to a series of managed chained handlers while being able to dynamically lookup and adopt the IRQs created for them. This is largely an opt-in interface, requiring CPUs to manually submit IRQs for subgroup splitting, in addition to providing identifiers in their enum maps that can be used for lazy lookup via the radix tree. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
339 lines
7.5 KiB
C
339 lines
7.5 KiB
C
/*
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* linux/arch/sh/kernel/irq.c
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*
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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*
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* SuperH version: Copyright (C) 1999 Niibe Yutaka
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*/
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/kernel_stat.h>
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#include <linux/seq_file.h>
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#include <linux/ftrace.h>
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#include <linux/delay.h>
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#include <asm/processor.h>
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#include <asm/machvec.h>
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#include <asm/uaccess.h>
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#include <asm/thread_info.h>
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#include <cpu/mmu_context.h>
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atomic_t irq_err_count;
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves, it doesn't deserve
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* a generic callback i think.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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atomic_inc(&irq_err_count);
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printk("unexpected IRQ trap at vector %02x\n", irq);
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}
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#if defined(CONFIG_PROC_FS)
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/*
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* /proc/interrupts printing:
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*/
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static int show_other_interrupts(struct seq_file *p, int prec)
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{
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int j;
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seq_printf(p, "%*s: ", prec, "NMI");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stat[j].__nmi_count);
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seq_printf(p, " Non-maskable interrupts\n");
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seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
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return 0;
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}
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int show_interrupts(struct seq_file *p, void *v)
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{
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unsigned long flags, any_count = 0;
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int i = *(loff_t *)v, j, prec;
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struct irqaction *action;
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struct irq_desc *desc;
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if (i > nr_irqs)
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return 0;
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for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
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j *= 10;
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if (i == nr_irqs)
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return show_other_interrupts(p, prec);
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if (i == 0) {
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seq_printf(p, "%*s", prec + 8, "");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%-8d", j);
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seq_putc(p, '\n');
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}
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desc = irq_to_desc(i);
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if (!desc)
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return 0;
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raw_spin_lock_irqsave(&desc->lock, flags);
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for_each_online_cpu(j)
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any_count |= kstat_irqs_cpu(i, j);
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action = desc->action;
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if (!action && !any_count)
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goto out;
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seq_printf(p, "%*d: ", prec, i);
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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seq_printf(p, " %14s", desc->chip->name);
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seq_printf(p, "-%-8s", desc->name);
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if (action) {
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seq_printf(p, " %s", action->name);
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while ((action = action->next) != NULL)
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seq_printf(p, ", %s", action->name);
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}
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seq_putc(p, '\n');
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out:
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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#endif
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#ifdef CONFIG_IRQSTACKS
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/*
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* per-CPU IRQ handling contexts (thread information and stack)
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*/
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union irq_ctx {
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struct thread_info tinfo;
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u32 stack[THREAD_SIZE/sizeof(u32)];
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};
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static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
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static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
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static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
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static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
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static inline void handle_one_irq(unsigned int irq)
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{
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union irq_ctx *curctx, *irqctx;
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curctx = (union irq_ctx *)current_thread_info();
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irqctx = hardirq_ctx[smp_processor_id()];
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/*
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* this is where we switch to the IRQ stack. However, if we are
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* already using the IRQ stack (because we interrupted a hardirq
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* handler) we can't do that and just have to keep using the
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* current stack (which is the irq stack already after all)
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*/
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if (curctx != irqctx) {
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u32 *isp;
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isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
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irqctx->tinfo.task = curctx->tinfo.task;
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irqctx->tinfo.previous_sp = current_stack_pointer;
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/*
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* Copy the softirq bits in preempt_count so that the
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* softirq checks work in the hardirq context.
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*/
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irqctx->tinfo.preempt_count =
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(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
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(curctx->tinfo.preempt_count & SOFTIRQ_MASK);
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__asm__ __volatile__ (
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"mov %0, r4 \n"
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"mov r15, r8 \n"
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"jsr @%1 \n"
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/* swith to the irq stack */
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" mov %2, r15 \n"
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/* restore the stack (ring zero) */
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"mov r8, r15 \n"
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: /* no outputs */
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: "r" (irq), "r" (generic_handle_irq), "r" (isp)
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: "memory", "r0", "r1", "r2", "r3", "r4",
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"r5", "r6", "r7", "r8", "t", "pr"
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);
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} else
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generic_handle_irq(irq);
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}
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/*
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* allocate per-cpu stacks for hardirq and for softirq processing
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*/
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void irq_ctx_init(int cpu)
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{
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union irq_ctx *irqctx;
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if (hardirq_ctx[cpu])
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return;
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irqctx = (union irq_ctx *)&hardirq_stack[cpu * THREAD_SIZE];
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
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irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
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hardirq_ctx[cpu] = irqctx;
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irqctx = (union irq_ctx *)&softirq_stack[cpu * THREAD_SIZE];
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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irqctx->tinfo.preempt_count = 0;
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irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
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softirq_ctx[cpu] = irqctx;
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printk("CPU %u irqstacks, hard=%p soft=%p\n",
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cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
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}
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void irq_ctx_exit(int cpu)
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{
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hardirq_ctx[cpu] = NULL;
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}
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asmlinkage void do_softirq(void)
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{
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unsigned long flags;
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struct thread_info *curctx;
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union irq_ctx *irqctx;
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u32 *isp;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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if (local_softirq_pending()) {
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curctx = current_thread_info();
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irqctx = softirq_ctx[smp_processor_id()];
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irqctx->tinfo.task = curctx->task;
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irqctx->tinfo.previous_sp = current_stack_pointer;
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/* build the stack frame on the softirq stack */
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isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
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__asm__ __volatile__ (
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"mov r15, r9 \n"
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"jsr @%0 \n"
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/* switch to the softirq stack */
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" mov %1, r15 \n"
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/* restore the thread stack */
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"mov r9, r15 \n"
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: /* no outputs */
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: "r" (__do_softirq), "r" (isp)
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: "memory", "r0", "r1", "r2", "r3", "r4",
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"r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
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);
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/*
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* Shouldnt happen, we returned above if in_interrupt():
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*/
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WARN_ON_ONCE(softirq_count());
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}
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local_irq_restore(flags);
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}
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#else
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static inline void handle_one_irq(unsigned int irq)
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{
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generic_handle_irq(irq);
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}
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#endif
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asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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irq = irq_demux(irq_lookup(irq));
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if (irq != NO_IRQ_IGNORE) {
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handle_one_irq(irq);
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irq_finish(irq);
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}
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irq_exit();
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set_irq_regs(old_regs);
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return IRQ_HANDLED;
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}
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void __init init_IRQ(void)
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{
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plat_irq_setup();
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/*
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* Pin any of the legacy IRQ vectors that haven't already been
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* grabbed by the platform
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*/
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reserve_irq_legacy();
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/* Perform the machine specific initialisation */
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if (sh_mv.mv_init_irq)
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sh_mv.mv_init_irq();
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intc_finalize();
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irq_ctx_init(smp_processor_id());
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}
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#ifdef CONFIG_SPARSE_IRQ
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int __init arch_probe_nr_irqs(void)
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{
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nr_irqs = sh_mv.mv_nr_irqs;
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return 0;
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}
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
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{
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printk(KERN_INFO "IRQ%u: moving from cpu%u to cpu%u\n",
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irq, desc->node, cpu);
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raw_spin_lock_irq(&desc->lock);
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desc->chip->set_affinity(irq, cpumask_of(cpu));
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raw_spin_unlock_irq(&desc->lock);
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}
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/*
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* The CPU has been marked offline. Migrate IRQs off this CPU. If
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* the affinity settings do not allow other CPUs, force them onto any
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* available CPU.
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*/
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void migrate_irqs(void)
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{
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struct irq_desc *desc;
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unsigned int irq, cpu = smp_processor_id();
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for_each_irq_desc(irq, desc) {
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if (desc->node == cpu) {
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unsigned int newcpu = cpumask_any_and(desc->affinity,
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cpu_online_mask);
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if (newcpu >= nr_cpu_ids) {
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if (printk_ratelimit())
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printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
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irq, cpu);
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cpumask_setall(desc->affinity);
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newcpu = cpumask_any_and(desc->affinity,
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cpu_online_mask);
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}
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route_irq(desc, irq, newcpu);
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}
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}
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}
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#endif
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