7e78e5e502
The gianfar driver changed how it required MDIO bus and phy id's to be passed to it. Also, it no longer passes the physical address of the MDIO bus. Instead we have a proper platform device. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
230 lines
5.9 KiB
C
230 lines
5.9 KiB
C
/*
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* arch/ppc/platforms/85xx/mpc8540_ads.c
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*
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* MPC8540ADS board specific routines
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2004 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/tty.h> /* for linux/serial_core.h */
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#include <linux/serial_core.h>
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#include <linux/initrd.h>
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#include <linux/module.h>
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#include <linux/fsl_devices.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/open_pic.h>
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#include <asm/bootinfo.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc85xx.h>
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#include <asm/irq.h>
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#include <asm/immap_85xx.h>
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#include <asm/kgdb.h>
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#include <asm/ppc_sys.h>
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#include <mm/mmu_decl.h>
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#include <syslib/ppc85xx_setup.h>
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init
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mpc8540ads_setup_arch(void)
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{
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bd_t *binfo = (bd_t *) __res;
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unsigned int freq;
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struct gianfar_platform_data *pdata;
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struct gianfar_mdio_data *mdata;
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/* get the core frequency */
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freq = binfo->bi_intfreq;
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if (ppc_md.progress)
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ppc_md.progress("mpc8540ads_setup_arch()", 0);
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/* Set loops_per_jiffy to a half-way reasonable value,
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for use until calibrate_delay gets called. */
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loops_per_jiffy = freq / HZ;
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#ifdef CONFIG_PCI
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/* setup PCI host bridges */
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mpc85xx_setup_hose();
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#endif
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#ifdef CONFIG_SERIAL_8250
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mpc85xx_early_serial_map();
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#endif
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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/* Invalidate the entry we stole earlier the serial ports
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* should be properly mapped */
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invalidate_tlbcam_entry(num_tlbcam_entries - 1);
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#endif
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/* setup the board related info for the MDIO bus */
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mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
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mdata->irq[0] = MPC85xx_IRQ_EXT5;
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mdata->irq[1] = MPC85xx_IRQ_EXT5;
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mdata->irq[2] = -1;
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mdata->irq[3] = MPC85xx_IRQ_EXT5;
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mdata->irq[31] = -1;
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/* setup the board related information for the enet controllers */
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pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
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if (pdata) {
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pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
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pdata->bus_id = 0;
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pdata->phy_id = 0;
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memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
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}
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pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
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if (pdata) {
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pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
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pdata->bus_id = 0;
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pdata->phy_id = 1;
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memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
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}
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pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
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if (pdata) {
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pdata->board_flags = 0;
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pdata->bus_id = 0;
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pdata->phy_id = 3;
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memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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}
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/* ************************************************************************ */
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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/* parse_bootinfo must always be called first */
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parse_bootinfo(find_bootinfo());
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/*
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* If we were passed in a board information, copy it into the
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* residual data area.
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*/
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if (r3) {
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memcpy((void *) __res, (void *) (r3 + KERNELBASE),
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sizeof (bd_t));
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}
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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{
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bd_t *binfo = (bd_t *) __res;
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struct uart_port p;
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/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
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settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
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binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
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memset(&p, 0, sizeof (p));
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p.iotype = SERIAL_IO_MEM;
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p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
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p.uartclk = binfo->bi_busfreq;
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gen550_init(0, &p);
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memset(&p, 0, sizeof (p));
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p.iotype = SERIAL_IO_MEM;
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p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
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p.uartclk = binfo->bi_busfreq;
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gen550_init(1, &p);
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}
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#endif
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#if defined(CONFIG_BLK_DEV_INITRD)
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/*
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* If the init RAM disk has been configured in, and there's a valid
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* starting address for it, set it up.
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*/
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if (r4) {
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initrd_start = r4 + KERNELBASE;
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initrd_end = r5 + KERNELBASE;
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}
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#endif /* CONFIG_BLK_DEV_INITRD */
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/* Copy the kernel command line arguments to a safe place. */
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if (r6) {
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*(char *) (r7 + KERNELBASE) = 0;
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strcpy(cmd_line, (char *) (r6 + KERNELBASE));
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}
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identify_ppc_sys_by_id(mfspr(SPRN_SVR));
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/* setup the PowerPC module struct */
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ppc_md.setup_arch = mpc8540ads_setup_arch;
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ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
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ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
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ppc_md.get_irq = openpic_get_irq;
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ppc_md.restart = mpc85xx_restart;
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ppc_md.power_off = mpc85xx_power_off;
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ppc_md.halt = mpc85xx_halt;
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ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
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ppc_md.time_init = NULL;
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ppc_md.set_rtc_time = NULL;
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ppc_md.get_rtc_time = NULL;
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ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
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#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
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ppc_md.progress = gen550_progress;
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#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
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#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
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ppc_md.early_serial_map = mpc85xx_early_serial_map;
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#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
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if (ppc_md.progress)
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ppc_md.progress("mpc8540ads_init(): exit", 0);
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return;
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}
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