69ea5fcb5e
We have lots of tiny files right now that could be one Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
151 lines
4.9 KiB
C
151 lines
4.9 KiB
C
/*
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* http://www.agere.com
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*
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*------------------------------------------------------------------------------
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*
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* et1310_tx.h - Defines, structs, enums, prototypes, etc. pertaining to data
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* transmission.
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*
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*------------------------------------------------------------------------------
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*
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* SOFTWARE LICENSE
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*
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* This software is provided subject to the following terms and conditions,
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* which you should read carefully before using the software. Using this
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* software indicates your acceptance of these terms and conditions. If you do
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* not agree with these terms and conditions, do not use the software.
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*
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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*
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* Redistribution and use in source or binary forms, with or without
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* modifications, are permitted provided that the following conditions are met:
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*
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* . Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following Disclaimer as comments in the code as
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* well as in the documentation and/or other materials provided with the
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* distribution.
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*
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* . Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following Disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* . Neither the name of Agere Systems Inc. nor the names of the contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* Disclaimer
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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*
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*/
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#ifndef __ET1310_TX_H__
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#define __ET1310_TX_H__
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/* Typedefs for Tx Descriptor Ring */
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/*
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* word 2 of the control bits in the Tx Descriptor ring for the ET-1310
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*
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* 0-15: length of packet
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* 16-27: VLAN tag
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* 28: VLAN CFI
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* 29-31: VLAN priority
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*
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* word 3 of the control bits in the Tx Descriptor ring for the ET-1310
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*
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* 0: last packet in the sequence
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* 1: first packet in the sequence
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* 2: interrupt the processor when this pkt sent
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* 3: Control word - no packet data
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* 4: Issue half-duplex backpressure : XON/XOFF
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* 5: send pause frame
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* 6: Tx frame has error
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* 7: append CRC
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* 8: MAC override
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* 9: pad packet
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* 10: Packet is a Huge packet
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* 11: append VLAN tag
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* 12: IP checksum assist
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* 13: TCP checksum assist
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* 14: UDP checksum assist
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*/
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/* struct tx_desc represents each descriptor on the ring */
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struct tx_desc {
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u32 addr_hi;
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u32 addr_lo;
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u32 len_vlan; /* control words how to xmit the */
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u32 flags; /* data (detailed above) */
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};
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/*
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* The status of the Tx DMA engine it sits in free memory, and is pointed to
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* by 0x101c / 0x1020. This is a DMA10 type
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*/
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/* TCB (Transmit Control Block: Host Side) */
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struct tcb {
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struct tcb *next; /* Next entry in ring */
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u32 flags; /* Our flags for the packet */
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u32 count; /* Used to spot stuck/lost packets */
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u32 stale; /* Used to spot stuck/lost packets */
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struct sk_buff *skb; /* Network skb we are tied to */
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u32 index; /* Ring indexes */
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u32 index_start;
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};
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/* Structure representing our local reference(s) to the ring */
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struct tx_ring {
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/* TCB (Transmit Control Block) memory and lists */
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struct tcb *tcb_ring;
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/* List of TCBs that are ready to be used */
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struct tcb *tcb_qhead;
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struct tcb *tcb_qtail;
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/* list of TCBs that are currently being sent. NOTE that access to all
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* three of these (including used) are controlled via the
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* TCBSendQLock. This lock should be secured prior to incementing /
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* decrementing used, or any queue manipulation on send_head /
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* tail
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*/
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struct tcb *send_head;
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struct tcb *send_tail;
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int used;
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/* The actual descriptor ring */
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struct tx_desc *tx_desc_ring;
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dma_addr_t tx_desc_ring_pa;
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/* send_idx indicates where we last wrote to in the descriptor ring. */
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u32 send_idx;
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/* The location of the write-back status block */
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u32 *tx_status;
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dma_addr_t tx_status_pa;
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/* Packets since the last IRQ: used for interrupt coalescing */
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int since_irq;
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};
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#endif /* __ET1310_TX_H__ */
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