Ralf Baechle 4debe4f963 [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs. ... When a CPU has no scache, the scache flushing functions currently aren't getting initialized and the NULL pointer is eventually called as a function. Initialize the scache flushing functions as a noop when there's no scache. Initial patch by me and most of the debugging done by Martin Michlmayr. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2006-02-28 17:04:19 +00:00
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c-r3k.c	Cleanup the mess in cpu_cache_init.	2005-10-29 19:32:32 +01:00
c-r4k.c	[MIPS] Initialize S-cache function pointers even on S-cache-less CPUs.	2006-02-28 17:04:19 +00:00
c-sb1.c	Don't copy SB1 cache error handler to uncached memory.	2005-10-29 19:32:34 +01:00
c-tx39.c	[MIPS] Add protected_blast_icache_range, blast_icache_range, etc.	2006-02-14 19:13:24 +00:00
cache.c	[MIPS] Remove wrong __user tags.	2006-02-07 13:30:25 +00:00
cerr-sb1.c	SB1 cache exception handling.	2005-10-29 19:32:48 +01:00
cex-gen.S
cex-sb1.S	[MIPS] Sibyte: #if CONFIG_* doesn't fly.	2006-02-21 16:58:23 +00:00
dma-coherent.c	Arrested for multiple offences of header file inclusion.	2005-10-29 19:31:07 +01:00
dma-ip27.c
dma-ip32.c
dma-noncoherent.c	Don't set up a sg dma address if we have no page address for some reason.	2005-10-29 19:32:17 +01:00
extable.c
fault.c	Sparseify MIPS.	2005-10-29 19:30:50 +01:00
highmem.c	Define kmap_atomic_pfn() for MIPS.	2005-10-29 19:31:42 +01:00
init.c	[MIPS] Support /proc/kcore for MIPS	2006-02-07 13:30:25 +00:00
ioremap.c	[PATCH] mm: init_mm without ptlock	2005-10-29 21:40:40 -07:00
Makefile	Fixup a few lose ends in explicit support for MIPS R1/R2.	2005-10-29 19:32:37 +01:00
pg-r4k.c	Add/Fix missing bit of R4600 hit cacheop workaround.	2005-10-29 19:32:18 +01:00
pg-sb1.c	Remove useless casts. Fix formatting.	2005-10-29 19:31:00 +01:00
pgtable-32.c	Update MIPS to use the 4-level pagetable code thereby getting rid of	2005-10-29 19:30:31 +01:00
pgtable-64.c
pgtable.c
sc-ip22.c
sc-r5k.c
sc-rm7k.c	Use macros for the RM7k cp0.config bits instead of magic numbers.	2005-10-29 19:31:28 +01:00
tlb-andes.c	Update MIPS to use the 4-level pagetable code thereby getting rid of	2005-10-29 19:30:31 +01:00
tlb-r3k.c
tlb-r4k.c	Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.	2005-10-29 19:31:37 +01:00
tlb-r8k.c
tlbex-fault.S
tlbex.c	Add support for SB1A CPU.	2005-10-29 19:32:46 +01:00