bb75c627fb
This reverts commit a15bd354f0.
It exceeded the padding on the SREGS struct, rendering the ABI
backwards-incompatible.
Conflicts:
arch/powerpc/kvm/powerpc.c
include/linux/kvm.h
Signed-off-by: Avi Kivity <avi@redhat.com>
425 lines
11 KiB
C
425 lines
11 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#ifndef __ASM_KVM_BOOK3S_H__
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#define __ASM_KVM_BOOK3S_H__
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#include <linux/types.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_book3s_asm.h>
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struct kvmppc_bat {
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u64 raw;
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u32 bepi;
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u32 bepi_mask;
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u32 brpn;
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u8 wimg;
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u8 pp;
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bool vs : 1;
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bool vp : 1;
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};
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struct kvmppc_sid_map {
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u64 guest_vsid;
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u64 guest_esid;
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u64 host_vsid;
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bool valid : 1;
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};
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#define SID_MAP_BITS 9
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#define SID_MAP_NUM (1 << SID_MAP_BITS)
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#define SID_MAP_MASK (SID_MAP_NUM - 1)
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#ifdef CONFIG_PPC_BOOK3S_64
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#define SID_CONTEXTS 1
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#else
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#define SID_CONTEXTS 128
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#define VSID_POOL_SIZE (SID_CONTEXTS * 16)
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#endif
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struct hpte_cache {
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struct hlist_node list_pte;
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struct hlist_node list_pte_long;
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struct hlist_node list_vpte;
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struct hlist_node list_vpte_long;
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struct rcu_head rcu_head;
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u64 host_va;
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u64 pfn;
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ulong slot;
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struct kvmppc_pte pte;
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};
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struct kvmppc_vcpu_book3s {
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struct kvm_vcpu vcpu;
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struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
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struct kvmppc_sid_map sid_map[SID_MAP_NUM];
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struct {
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u64 esid;
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u64 vsid;
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} slb_shadow[64];
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u8 slb_shadow_max;
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struct kvmppc_bat ibat[8];
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struct kvmppc_bat dbat[8];
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u64 hid[6];
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u64 gqr[8];
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u64 sdr1;
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u64 hior;
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u64 msr_mask;
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u64 vsid_next;
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#ifdef CONFIG_PPC_BOOK3S_32
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u32 vsid_pool[VSID_POOL_SIZE];
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#else
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u64 vsid_first;
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u64 vsid_max;
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#endif
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int context_id[SID_CONTEXTS];
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struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
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struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
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struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
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struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
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int hpte_cache_count;
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spinlock_t mmu_lock;
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};
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#define CONTEXT_HOST 0
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#define CONTEXT_GUEST 1
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#define CONTEXT_GUEST_END 2
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#define VSID_REAL 0x1fffffffffc00000ULL
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#define VSID_BAT 0x1fffffffffb00000ULL
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#define VSID_REAL_DR 0x2000000000000000ULL
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#define VSID_REAL_IR 0x4000000000000000ULL
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#define VSID_PR 0x8000000000000000ULL
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extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong ea, ulong ea_mask);
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extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask);
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extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end);
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extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr);
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extern void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr);
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extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu);
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extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte);
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extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr);
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extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
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extern struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_hpte_destroy(struct kvm_vcpu *vcpu);
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extern int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
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extern int kvmppc_mmu_hpte_sysinit(void);
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extern void kvmppc_mmu_hpte_sysexit(void);
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extern int kvmppc_mmu_hv_init(void);
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extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
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extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
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extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec);
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extern void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags);
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extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
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bool upper, u32 val);
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extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
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extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu);
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extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
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extern void kvmppc_entry_trampoline(void);
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extern void kvmppc_hv_entry_trampoline(void);
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extern void kvmppc_load_up_fpu(void);
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extern void kvmppc_load_up_altivec(void);
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extern void kvmppc_load_up_vsx(void);
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extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
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extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
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extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd);
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static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
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{
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return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu);
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}
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extern void kvm_return_point(void);
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/* Also add subarch specific defines */
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#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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#include <asm/kvm_book3s_32.h>
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#endif
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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#include <asm/kvm_book3s_64.h>
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#endif
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#ifdef CONFIG_KVM_BOOK3S_PR
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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return to_book3s(vcpu)->hior;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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if (pending_now)
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vcpu->arch.shared->int_pending = 1;
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else if (old_pending)
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vcpu->arch.shared->int_pending = 0;
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}
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static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
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{
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if ( num < 14 ) {
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to_svcpu(vcpu)->gpr[num] = val;
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to_book3s(vcpu)->shadow_vcpu->gpr[num] = val;
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} else
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vcpu->arch.gpr[num] = val;
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}
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static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
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{
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if ( num < 14 )
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return to_svcpu(vcpu)->gpr[num];
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else
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return vcpu->arch.gpr[num];
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}
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static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
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{
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to_svcpu(vcpu)->cr = val;
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to_book3s(vcpu)->shadow_vcpu->cr = val;
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}
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static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->cr;
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}
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static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
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{
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to_svcpu(vcpu)->xer = val;
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to_book3s(vcpu)->shadow_vcpu->xer = val;
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}
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static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->xer;
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}
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static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
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{
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to_svcpu(vcpu)->ctr = val;
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}
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static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->ctr;
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}
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static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
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{
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to_svcpu(vcpu)->lr = val;
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}
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static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->lr;
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}
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static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
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{
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to_svcpu(vcpu)->pc = val;
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}
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static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->pc;
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}
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static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
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{
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ulong pc = kvmppc_get_pc(vcpu);
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struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu);
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/* Load the instruction manually if it failed to do so in the
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* exit path */
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if (svcpu->last_inst == KVM_INST_FETCH_FAILED)
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kvmppc_ld(vcpu, &pc, sizeof(u32), &svcpu->last_inst, false);
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return svcpu->last_inst;
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}
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static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
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{
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return to_svcpu(vcpu)->fault_dar;
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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ulong crit_raw = vcpu->arch.shared->critical;
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ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
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bool crit;
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/* Truncate crit indicators in 32 bit mode */
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if (!(vcpu->arch.shared->msr & MSR_SF)) {
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
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return crit;
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}
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#else /* CONFIG_KVM_BOOK3S_PR */
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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return 0;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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}
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static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
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{
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vcpu->arch.gpr[num] = val;
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}
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static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
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{
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return vcpu->arch.gpr[num];
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}
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static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
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{
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vcpu->arch.cr = val;
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}
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static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.cr;
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}
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static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
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{
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vcpu->arch.xer = val;
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}
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static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.xer;
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}
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static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
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{
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vcpu->arch.ctr = val;
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}
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static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.ctr;
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}
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static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
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{
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vcpu->arch.lr = val;
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}
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static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.lr;
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}
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static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
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{
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vcpu->arch.pc = val;
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}
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static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.pc;
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}
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static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
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{
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ulong pc = kvmppc_get_pc(vcpu);
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/* Load the instruction manually if it failed to do so in the
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* exit path */
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if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
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kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
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return vcpu->arch.last_inst;
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}
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static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault_dar;
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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return false;
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}
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#endif
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static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
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unsigned long pte_index)
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{
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unsigned long rb, va_low;
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rb = (v & ~0x7fUL) << 16; /* AVA field */
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va_low = pte_index >> 3;
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if (v & HPTE_V_SECONDARY)
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va_low = ~va_low;
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/* xor vsid from AVA */
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if (!(v & HPTE_V_1TB_SEG))
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va_low ^= v >> 12;
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else
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va_low ^= v >> 24;
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va_low &= 0x7ff;
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if (v & HPTE_V_LARGE) {
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rb |= 1; /* L field */
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if (cpu_has_feature(CPU_FTR_ARCH_206) &&
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(r & 0xff000)) {
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/* non-16MB large page, must be 64k */
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/* (masks depend on page size) */
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rb |= 0x1000; /* page encoding in LP field */
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rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
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rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
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}
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} else {
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/* 4kB page */
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rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
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}
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rb |= (v >> 54) & 0x300; /* B field */
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return rb;
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}
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/* Magic register values loaded into r3 and r4 before the 'sc' assembly
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* instruction for the OSI hypercalls */
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#define OSI_SC_MAGIC_R3 0x113724FA
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#define OSI_SC_MAGIC_R4 0x77810F9B
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#define INS_DCBZ 0x7c0007ec
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#endif /* __ASM_KVM_BOOK3S_H__ */
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