6b3d7f02a1
Follow the mach-harp changes to get the simulator support building. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
127 lines
3.2 KiB
C
127 lines
3.2 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* arch/sh64/mach-sim/setup.c
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*
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* ST50 Simulator Platform Support
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*
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* This file handles the architecture-dependent parts of initialization
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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*
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* lethal@linux-sh.org: 15th May 2003
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* Use the generic procfs cpuinfo interface, just return a valid board name.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/platform.h>
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#include <asm/irq.h>
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/*
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* Platform Dependent Interrupt Priorities.
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*/
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/* Using defaults defined in irq.h */
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#define RES NO_PRIORITY /* Disabled */
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#define IR0 IRL0_PRIORITY /* IRLs */
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#define IR1 IRL1_PRIORITY
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#define IR2 IRL2_PRIORITY
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#define IR3 IRL3_PRIORITY
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#define PCA INTA_PRIORITY /* PCI Ints */
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#define PCB INTB_PRIORITY
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#define PCC INTC_PRIORITY
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#define PCD INTD_PRIORITY
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#define SER TOP_PRIORITY
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#define ERR TOP_PRIORITY
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#define PW0 TOP_PRIORITY
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#define PW1 TOP_PRIORITY
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#define PW2 TOP_PRIORITY
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#define PW3 TOP_PRIORITY
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#define DM0 NO_PRIORITY /* DMA Ints */
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#define DM1 NO_PRIORITY
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#define DM2 NO_PRIORITY
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#define DM3 NO_PRIORITY
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#define DAE NO_PRIORITY
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#define TU0 TIMER_PRIORITY /* TMU Ints */
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#define TU1 NO_PRIORITY
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#define TU2 NO_PRIORITY
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#define TI2 NO_PRIORITY
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#define ATI NO_PRIORITY /* RTC Ints */
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#define PRI NO_PRIORITY
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#define CUI RTC_PRIORITY
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#define ERI SCIF_PRIORITY /* SCIF Ints */
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#define RXI SCIF_PRIORITY
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#define BRI SCIF_PRIORITY
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#define TXI SCIF_PRIORITY
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#define ITI TOP_PRIORITY /* WDT Ints */
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/*
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* Platform dependent structures: maps and parms block.
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*/
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struct resource io_resources[] = {
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/* Nothing yet .. */
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};
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struct resource kram_resources[] = {
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/* These must be last in the array */
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{ .name = "Kernel code", .start = 0, .end = 0 },
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/* These must be last in the array */
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{ .name = "Kernel data", .start = 0, .end = 0 }
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};
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struct resource xram_resources[] = {
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/* Nothing yet .. */
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};
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struct resource rom_resources[] = {
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/* Nothing yet .. */
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};
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struct sh64_platform platform_parms = {
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.readonly_rootfs = 1,
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.initial_root_dev = 0x0100,
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.loader_type = 1,
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.io_res_p = io_resources,
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.io_res_count = ARRAY_SIZE(io_resources),
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.kram_res_p = kram_resources,
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.kram_res_count = ARRAY_SIZE(kram_resources),
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.xram_res_p = xram_resources,
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.xram_res_count = ARRAY_SIZE(xram_resources),
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.rom_res_p = rom_resources,
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.rom_res_count = ARRAY_SIZE(rom_resources),
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};
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int platform_int_priority[NR_IRQS] = {
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IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
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RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
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PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
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RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
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TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
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RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
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RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
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RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
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};
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void __init platform_setup(void)
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{
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/* Simulator platform leaves the decision to head.S */
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platform_parms.fpu_flags = fpu_in_use;
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}
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void __init platform_monitor(void)
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{
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/* Nothing yet .. */
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}
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void __init platform_reserve(void)
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{
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/* Nothing yet .. */
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}
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const char *get_system_type(void)
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{
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return "SH-5 Simulator";
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}
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