5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
259 lines
7.5 KiB
C
259 lines
7.5 KiB
C
/*
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* linux/arch/arm/mach-omap2/mcbsp.c
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*
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* Copyright (C) 2008 Instituto Nokia de Tecnologia
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* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Multichannel mode not supported.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <mach/irqs.h>
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#include <plat/dma.h>
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#include <plat/mux.h>
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#include <plat/cpu.h>
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#include <plat/mcbsp.h>
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static void omap2_mcbsp2_mux_setup(void)
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{
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omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
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omap_cfg_reg(R14_24XX_MCBSP2_FSX);
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omap_cfg_reg(W15_24XX_MCBSP2_DR);
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omap_cfg_reg(V15_24XX_MCBSP2_DX);
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omap_cfg_reg(V14_24XX_GPIO117);
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/*
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* TODO: Need to add MUX settings for OMAP 2430 SDP
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*/
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}
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static void omap2_mcbsp_request(unsigned int id)
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{
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if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
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omap2_mcbsp2_mux_setup();
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}
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static struct omap_mcbsp_ops omap2_mcbsp_ops = {
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.request = omap2_mcbsp_request,
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};
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#ifdef CONFIG_ARCH_OMAP2420
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static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
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{
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.phys_base = OMAP24XX_MCBSP1_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP24XX_MCBSP2_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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};
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#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
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#define OMAP2420_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
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#else
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#define omap2420_mcbsp_pdata NULL
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#define OMAP2420_MCBSP_PDATA_SZ 0
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#define OMAP2420_MCBSP_REG_NUM 0
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
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{
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.phys_base = OMAP24XX_MCBSP1_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP24XX_MCBSP2_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP2430_MCBSP3_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
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.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP2430_MCBSP4_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
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.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP2430_MCBSP5_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
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.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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};
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#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
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#define OMAP2430_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
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#else
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#define omap2430_mcbsp_pdata NULL
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#define OMAP2430_MCBSP_PDATA_SZ 0
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#define OMAP2430_MCBSP_REG_NUM 0
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
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{
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.phys_base = OMAP34XX_MCBSP1_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.buffer_size = 0x6F,
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},
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{
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.phys_base = OMAP34XX_MCBSP2_BASE,
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.phys_base_st = OMAP34XX_MCBSP2_ST_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.buffer_size = 0x3FF,
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},
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{
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.phys_base = OMAP34XX_MCBSP3_BASE,
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.phys_base_st = OMAP34XX_MCBSP3_ST_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
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.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.buffer_size = 0x6F,
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},
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{
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.phys_base = OMAP34XX_MCBSP4_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
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.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.buffer_size = 0x6F,
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},
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{
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.phys_base = OMAP34XX_MCBSP5_BASE,
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.dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
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.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.buffer_size = 0x6F,
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},
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};
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#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
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#define OMAP34XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
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#else
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#define omap34xx_mcbsp_pdata NULL
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#define OMAP34XX_MCBSP_PDATA_SZ 0
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#define OMAP34XX_MCBSP_REG_NUM 0
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#endif
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static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
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{
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.phys_base = OMAP44XX_MCBSP1_BASE,
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.dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP44XX_MCBSP2_BASE,
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.dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP44XX_MCBSP3_BASE,
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.dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
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.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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{
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.phys_base = OMAP44XX_MCBSP4_BASE,
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.dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
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.dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
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.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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},
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};
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#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata)
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#define OMAP44XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1)
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static int __init omap2_mcbsp_init(void)
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{
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if (cpu_is_omap2420()) {
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omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
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omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16);
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} else if (cpu_is_omap2430()) {
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omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
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omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32);
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} else if (cpu_is_omap34xx()) {
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omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
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omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32);
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} else if (cpu_is_omap44xx()) {
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omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
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omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32);
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}
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mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
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GFP_KERNEL);
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if (!mcbsp_ptr)
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return -ENOMEM;
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if (cpu_is_omap2420())
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omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
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OMAP2420_MCBSP_PDATA_SZ);
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if (cpu_is_omap2430())
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omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
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OMAP2430_MCBSP_PDATA_SZ);
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if (cpu_is_omap34xx())
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omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
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OMAP34XX_MCBSP_PDATA_SZ);
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if (cpu_is_omap44xx())
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omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
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OMAP44XX_MCBSP_PDATA_SZ);
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return omap_mcbsp_init();
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}
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arch_initcall(omap2_mcbsp_init);
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