b6ae4055f4
- Support for the PMU in Broadcom's Vulcan CPU - Dynamic event detection using the PMCEIDn_EL0 ID registers -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJXNhyFAAoJELescNyEwWM0A0gIAL52VQid16PvLgEO4g6mzv5B S1ef/y45342R/DYczcUSFboMPuqYSxZ/i7dCwpvLUKX/YjyqQrrGvvS4IYOS99Mp /OAcf8eTyzzVpJiGQetta3q20gNHGXOxd48R1zcgt+bbEax89lyHQul0A8+rPWLq RZhEI6Hcq9fb70AjXjWvDxdbbJhtDKc8BGuptygOEqc8LO3mrb1J60TclU629XOH Jn4Vdu5f6Rx8hPFdw5HXn+Vdheymphz0qj1lyGCQS4Am97bM5J/54a/A4tyHnHuQ s9Y26NIAvrktp9wCMlXGQhYL94e1rZowXCWxF98D9XrlIzYORIdf/OZ5DCS8LCA= =0ntf -----END PGP SIGNATURE----- Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 perf updates from Will Deacon: "The main addition here is support for Broadcom's Vulcan core using the architected ID registers for discovering supported events. - Support for the PMU in Broadcom's Vulcan CPU - Dynamic event detection using the PMCEIDn_EL0 ID registers" * tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: perf: don't expose CHAIN event in sysfs arm64/perf: Add Broadcom Vulcan PMU support arm64/perf: Filter common events based on PMCEIDn_EL0 arm64/perf: Access pmu register using <read/write>_sys_reg arm64/perf: Define complete ARMv8 recommended implementation defined events arm64/perf: Changed events naming as per the ARM ARM arm64: dts: Add Broadcom Vulcan PMU in dts Documentation: arm64: pmu: Add Broadcom Vulcan PMU binding |
||
|---|---|---|
| .. | ||
| boot | ||
| configs | ||
| crypto | ||
| include | ||
| kernel | ||
| kvm | ||
| lib | ||
| mm | ||
| net | ||
| xen | ||
| Kconfig | ||
| Kconfig.debug | ||
| Kconfig.platforms | ||
| Makefile | ||