Jesse Brandeburg b5fc8f0c43 e1000: Fix MSI only interrupt handler routine
Unfortunately the read-free MSI interrupt handler needs to flush write
the icr register and thus we can't be read-free. Our MSI irq routine
thus becomes a lot more simpler since we don't need to track link state
anymore.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
2007-02-05 16:58:41 -05:00
..
2007-02-02 11:52:05 -05:00
2007-02-03 20:37:37 -08:00