5e41763ae9
72486f1f8f inverted the sense for enabling
hotplug CPU controls without reference to any other architecture other than
i386, ia64 and PowerPC. This left everyone else without hotplug CPU control.
Fix powerpc for this brain damage.
(akpm: patch adapted from rmk's ARM fix. Changelog stolen from rmk)
Signed-off-by: Giuliano Pochini <pochini@shiny.it>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
297 lines
6.6 KiB
C
297 lines
6.6 KiB
C
/*
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* Common prep/pmac/chrp boot and setup code.
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*/
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <linux/delay.h>
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#include <linux/initrd.h>
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#include <linux/ide.h>
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#include <linux/tty.h>
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#include <linux/bootmem.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/cpu.h>
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#include <linux/console.h>
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#include <asm/residual.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/processor.h>
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#include <asm/pgtable.h>
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#include <asm/setup.h>
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#include <asm/amigappc.h>
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#include <asm/smp.h>
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#include <asm/elf.h>
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#include <asm/cputable.h>
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#include <asm/bootx.h>
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#include <asm/btext.h>
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#include <asm/machdep.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/pmac_feature.h>
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#include <asm/sections.h>
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#include <asm/nvram.h>
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#include <asm/xmon.h>
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#include <asm/time.h>
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#include <asm/serial.h>
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#include <asm/udbg.h>
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#include "setup.h"
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#define DBG(fmt...)
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#if defined CONFIG_KGDB
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#include <asm/kgdb.h>
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#endif
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extern void bootx_init(unsigned long r4, unsigned long phys);
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struct ide_machdep_calls ppc_ide_md;
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int boot_cpuid;
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EXPORT_SYMBOL_GPL(boot_cpuid);
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int boot_cpuid_phys;
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unsigned long ISA_DMA_THRESHOLD;
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unsigned int DMA_MODE_READ;
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unsigned int DMA_MODE_WRITE;
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int have_of = 1;
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#ifdef CONFIG_VGA_CONSOLE
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unsigned long vgacon_remap_base;
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EXPORT_SYMBOL(vgacon_remap_base);
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#endif
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/*
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* These are used in binfmt_elf.c to put aux entries on the stack
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* for each elf executable being started.
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*/
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int dcache_bsize;
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int icache_bsize;
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int ucache_bsize;
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/*
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* We're called here very early in the boot. We determine the machine
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* type and call the appropriate low-level setup functions.
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* -- Cort <cort@fsmlabs.com>
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*
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* Note that the kernel may be running at an address which is different
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* from the address that it was linked at, so we must use RELOC/PTRRELOC
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* to access static data (including strings). -- paulus
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*/
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unsigned long __init early_init(unsigned long dt_ptr)
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{
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unsigned long offset = reloc_offset();
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struct cpu_spec *spec;
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/* First zero the BSS -- use memset_io, some platforms don't have
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* caches on yet */
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memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
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__bss_stop - __bss_start);
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/*
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* Identify the CPU type and fix up code sections
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* that depend on which cpu we have.
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*/
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spec = identify_cpu(offset, mfspr(SPRN_PVR));
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do_feature_fixups(spec->cpu_features,
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PTRRELOC(&__start___ftr_fixup),
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PTRRELOC(&__stop___ftr_fixup));
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return KERNELBASE + offset;
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}
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/*
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* Find out what kind of machine we're on and save any data we need
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* from the early boot process (devtree is copied on pmac by prom_init()).
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* This is called very early on the boot process, after a minimal
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* MMU environment has been set up but before MMU_init is called.
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*/
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void __init machine_init(unsigned long dt_ptr, unsigned long phys)
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{
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/* Enable early debugging if any specified (see udbg.h) */
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udbg_early_init();
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/* Do some early initialization based on the flat device tree */
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early_init_devtree(__va(dt_ptr));
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probe_machine();
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#ifdef CONFIG_6xx
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if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
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cpu_has_feature(CPU_FTR_CAN_NAP))
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ppc_md.power_save = ppc6xx_idle;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("id mach(): done", 0x200);
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}
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#ifdef CONFIG_BOOKE_WDT
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/* Checks wdt=x and wdt_period=xx command-line option */
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int __init early_parse_wdt(char *p)
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{
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if (p && strncmp(p, "0", 1) != 0)
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booke_wdt_enabled = 1;
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return 0;
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}
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early_param("wdt", early_parse_wdt);
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int __init early_parse_wdt_period (char *p)
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{
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if (p)
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booke_wdt_period = simple_strtoul(p, NULL, 0);
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return 0;
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}
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early_param("wdt_period", early_parse_wdt_period);
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#endif /* CONFIG_BOOKE_WDT */
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/* Checks "l2cr=xxxx" command-line option */
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int __init ppc_setup_l2cr(char *str)
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{
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if (cpu_has_feature(CPU_FTR_L2CR)) {
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unsigned long val = simple_strtoul(str, NULL, 0);
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printk(KERN_INFO "l2cr set to %lx\n", val);
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_set_L2CR(0); /* force invalidate by disable cache */
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_set_L2CR(val); /* and enable it */
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}
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return 1;
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}
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__setup("l2cr=", ppc_setup_l2cr);
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#ifdef CONFIG_GENERIC_NVRAM
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/* Generic nvram hooks used by drivers/char/gen_nvram.c */
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unsigned char nvram_read_byte(int addr)
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{
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if (ppc_md.nvram_read_val)
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return ppc_md.nvram_read_val(addr);
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return 0xff;
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}
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EXPORT_SYMBOL(nvram_read_byte);
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void nvram_write_byte(unsigned char val, int addr)
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{
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if (ppc_md.nvram_write_val)
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ppc_md.nvram_write_val(addr, val);
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}
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EXPORT_SYMBOL(nvram_write_byte);
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void nvram_sync(void)
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{
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if (ppc_md.nvram_sync)
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ppc_md.nvram_sync();
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}
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EXPORT_SYMBOL(nvram_sync);
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#endif /* CONFIG_NVRAM */
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static DEFINE_PER_CPU(struct cpu, cpu_devices);
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int __init ppc_init(void)
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{
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int cpu;
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/* clear the progress line */
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if (ppc_md.progress)
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ppc_md.progress(" ", 0xffff);
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/* register CPU devices */
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for_each_possible_cpu(cpu) {
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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c->hotpluggable = 1;
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register_cpu(c, cpu);
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}
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/* call platform init */
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if (ppc_md.init != NULL) {
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ppc_md.init();
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}
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return 0;
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}
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arch_initcall(ppc_init);
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/* Warning, IO base is not yet inited */
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void __init setup_arch(char **cmdline_p)
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{
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*cmdline_p = cmd_line;
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/* so udelay does something sensible, assume <= 1000 bogomips */
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loops_per_jiffy = 500000000 / HZ;
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unflatten_device_tree();
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check_for_initrd();
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if (ppc_md.init_early)
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ppc_md.init_early();
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find_legacy_serial_ports();
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smp_setup_cpu_maps();
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/* Register early console */
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register_early_udbg_console();
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xmon_setup();
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#if defined(CONFIG_KGDB)
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if (ppc_md.kgdb_map_scc)
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ppc_md.kgdb_map_scc();
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set_debug_traps();
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if (strstr(cmd_line, "gdb")) {
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if (ppc_md.progress)
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ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
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printk("kgdb breakpoint activated\n");
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breakpoint();
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}
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#endif
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/*
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* Set cache line size based on type of cpu as a default.
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* Systems with OF can look in the properties on the cpu node(s)
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* for a possibly more accurate value.
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*/
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if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
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dcache_bsize = cur_cpu_spec->dcache_bsize;
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icache_bsize = cur_cpu_spec->icache_bsize;
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ucache_bsize = 0;
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} else
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ucache_bsize = dcache_bsize = icache_bsize
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= cur_cpu_spec->dcache_bsize;
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/* reboot on panic */
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panic_timeout = 180;
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if (ppc_md.panic)
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setup_panic();
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init_mm.start_code = PAGE_OFFSET;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = klimit;
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/* set up the bootmem stuff with available memory */
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do_init_bootmem();
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if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
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ppc_md.setup_arch();
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if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
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paging_init();
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}
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