68abdbbb03
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
51 lines
1.1 KiB
C
51 lines
1.1 KiB
C
#ifndef __ASM_SH_HW_IRQ_H
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#define __ASM_SH_HW_IRQ_H
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#include <asm/atomic.h>
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extern atomic_t irq_err_count;
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struct intc2_data {
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unsigned short irq;
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unsigned char ipr_offset, ipr_shift;
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unsigned char msk_offset, msk_shift;
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unsigned char priority;
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};
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struct intc2_desc {
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unsigned long prio_base;
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unsigned long msk_base;
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unsigned long mskclr_base;
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struct intc2_data *intc2_data;
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unsigned int nr_irqs;
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struct irq_chip chip;
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};
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void register_intc2_controller(struct intc2_desc *);
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void init_IRQ_intc2(void);
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struct ipr_data {
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unsigned char irq;
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unsigned char ipr_idx; /* Index for the IPR registered */
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unsigned char shift; /* Number of bits to shift the data */
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unsigned char priority; /* The priority */
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};
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struct ipr_desc {
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unsigned long *ipr_offsets;
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unsigned int nr_offsets;
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struct ipr_data *ipr_data;
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unsigned int nr_irqs;
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struct irq_chip chip;
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};
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void register_ipr_controller(struct ipr_desc *);
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void init_IRQ_ipr(void);
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/*
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* Enable individual interrupt mode for external IPR IRQs.
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*/
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void ipr_irq_enable_irlm(void);
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#endif /* __ASM_SH_HW_IRQ_H */
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