adcdbc6651
The register offset for FW_BLC_SELF is a totally different set of bits on Broadwater (it's actually MI_RDRET_STATE), so don't treat it like FW_BLC_SELF on 965G chips. Fixes bug https://bugs.freedesktop.org/show_bug.cgi?id=26874. Cc: stable@kernel.org Tested-by: Norman Yarvin <yarvin@yarchive.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> |
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