b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
202 lines
11 KiB
C
202 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ARCH_PXA3xx_U2D_H
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#define __ASM_ARCH_PXA3xx_U2D_H
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#include <mach/bitfield.h>
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/*
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* USB2 device controller registers and bits definitions
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*/
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#define U2DCR (0x0000) /* U2D Control Register */
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#define U2DCR_NDC (1 << 31) /* NAK During Config */
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#define U2DCR_HSTC (0x7 << 28) /* High Speed Timeout Calibration */
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#define U2DCR_SPEOREN (1 << 27) /* Short Packet EOR INTR generation Enable */
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#define U2DCR_FSTC (0x7 << 24) /* Full Speed Timeout Calibration */
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#define U2DCR_UCLKOVR (1 << 22) /* UTM Clock Override */
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#define U2DCR_ABP (1 << 21) /* Application Bus Power */
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#define U2DCR_ADD (1 << 20) /* Application Device Disconnect */
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#define U2DCR_CC (1 << 19) /* Configuration Change */
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#define U2DCR_HS (1 << 18) /* High Speed USB Detection */
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#define U2DCR_SMAC (1 << 17) /* Switch Endpoint Memory to Active Configuration */
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#define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */
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#define U2DCR_ACN (0xf << 12) /* Active U2D Configuration Number */
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#define U2DCR_AIN (0xf << 8) /* Active U2D Interface Number */
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#define U2DCR_AAISN (0xf << 4) /* Active U2D Alternate Interface Setting Number */
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#define U2DCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */
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#define U2DCR_UDR (1 << 2) /* U2D Resume */
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#define U2DCR_UDA (1 << 1) /* U2D Active */
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#define U2DCR_UDE (1 << 0) /* U2D Enable */
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#define U2DICR (0x0004) /* U2D Interrupt Control Register */
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#define U2DISR (0x000C) /* U2D Interrupt Status Register */
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#define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */
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#define U2DINT_SOF (1 << 30) /* Interrupt - SOF */
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#define U2DINT_USOF (1 << 29) /* Interrupt - micro SOF */
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#define U2DINT_RU (1 << 28) /* Interrupt - Resume */
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#define U2DINT_SU (1 << 27) /* Interrupt - Suspend */
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#define U2DINT_RS (1 << 26) /* Interrupt - Reset */
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#define U2DINT_DPE (1 << 25) /* Interrupt - Data Packet Error */
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#define U2DINT_FIFOERR (0x4) /* Interrupt - endpoint FIFO error */
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#define U2DINT_PACKETCMP (0x2) /* Interrupt - endpoint packet complete */
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#define U2DINT_SPACKETCMP (0x1) /* Interrupt - endpoint short packet complete */
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#define U2DFNR (0x0014) /* U2D Frame Number Register */
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#define U2DINT(n, intr) (((intr) & 0x07) << (((n) & 0x07) * 3))
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#define U2DICR2 (0x0008) /* U2D Interrupt Control Register 2 */
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#define U2DISR2 (0x0010) /* U2D Interrupt Status Register 2 */
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#define U2DOTGCR (0x0020) /* U2D OTG Control Register */
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#define U2DOTGCR_OTGEN (1 << 31) /* On-The-Go Enable */
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#define U2DOTGCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocal Port Support */
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#define U2DOTGCR_AHNP (1 << 29) /* A-device Host Negotiation Protocal Support */
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#define U2DOTGCR_BHNP (1 << 28) /* B-device Host Negotiation Protocal Enable */
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#ifdef CONFIG_CPU_PXA930
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#define U2DOTGCR_LPA (1 << 15) /* ULPI low power mode active */
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#define U2DOTGCR_IESI (1 << 13) /* OTG interrupt Enable */
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#define U2DOTGCR_ISSI (1 << 12) /* OTG interrupt status */
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#endif
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#define U2DOTGCR_CKAF (1 << 5) /* Carkit Mode Alternate Function Select */
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#define U2DOTGCR_UTMID (1 << 4) /* UTMI Interface Disable */
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#define U2DOTGCR_ULAF (1 << 3) /* ULPI Mode Alternate Function Select */
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#define U2DOTGCR_SMAF (1 << 2) /* Serial Mode Alternate Function Select */
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#define U2DOTGCR_RTSM (1 << 1) /* Return to Synchronous Mode (ULPI Mode) */
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#define U2DOTGCR_ULE (1 << 0) /* ULPI Wrapper Enable */
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#define U2DOTGICR (0x0024) /* U2D OTG Interrupt Control Register */
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#define U2DOTGISR (0x0028) /* U2D OTG Interrupt Status Register */
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#define U2DOTGINT_SF (1 << 17) /* OTG Set Feature Command Received */
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#define U2DOTGINT_SI (1 << 16) /* OTG Interrupt */
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#define U2DOTGINT_RLS1 (1 << 14) /* RXCMD Linestate[1] Change Interrupt Rise */
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#define U2DOTGINT_RLS0 (1 << 13) /* RXCMD Linestate[0] Change Interrupt Rise */
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#define U2DOTGINT_RID (1 << 12) /* RXCMD OTG ID Change Interrupt Rise */
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#define U2DOTGINT_RSE (1 << 11) /* RXCMD OTG Session End Interrupt Rise */
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#define U2DOTGINT_RSV (1 << 10) /* RXCMD OTG Session Valid Interrupt Rise */
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#define U2DOTGINT_RVV (1 << 9) /* RXCMD OTG Vbus Valid Interrupt Rise */
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#define U2DOTGINT_RCK (1 << 8) /* RXCMD Carkit Interrupt Rise */
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#define U2DOTGINT_FLS1 (1 << 6) /* RXCMD Linestate[1] Change Interrupt Fall */
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#define U2DOTGINT_FLS0 (1 << 5) /* RXCMD Linestate[0] Change Interrupt Fall */
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#define U2DOTGINT_FID (1 << 4) /* RXCMD OTG ID Change Interrupt Fall */
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#define U2DOTGINT_FSE (1 << 3) /* RXCMD OTG Session End Interrupt Fall */
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#define U2DOTGINT_FSV (1 << 2) /* RXCMD OTG Session Valid Interrupt Fall */
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#define U2DOTGINT_FVV (1 << 1) /* RXCMD OTG Vbus Valid Interrupt Fall */
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#define U2DOTGINT_FCK (1 << 0) /* RXCMD Carkit Interrupt Fall */
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#define U2DOTGUSR (0x002C) /* U2D OTG ULPI Status Register */
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#define U2DOTGUSR_LPA (1 << 31) /* ULPI Low Power Mode Active */
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#define U2DOTGUSR_S6A (1 << 30) /* ULPI Serial Mode (6-pin) Active */
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#define U2DOTGUSR_S3A (1 << 29) /* ULPI Serial Mode (3-pin) Active */
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#define U2DOTGUSR_CKA (1 << 28) /* ULPI Car Kit Mode Active */
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#define U2DOTGUSR_LS1 (1 << 6) /* RXCMD Linestate 1 Status */
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#define U2DOTGUSR_LS0 (1 << 5) /* RXCMD Linestate 0 Status */
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#define U2DOTGUSR_ID (1 << 4) /* OTG IDGnd Status */
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#define U2DOTGUSR_SE (1 << 3) /* OTG Session End Status */
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#define U2DOTGUSR_SV (1 << 2) /* OTG Session Valid Status */
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#define U2DOTGUSR_VV (1 << 1) /* OTG Vbus Valid Status */
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#define U2DOTGUSR_CK (1 << 0) /* Carkit Interrupt Status */
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#define U2DOTGUCR (0x0030) /* U2D OTG ULPI Control Register */
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#define U2DOTGUCR_RUN (1 << 25) /* RUN */
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#define U2DOTGUCR_RNW (1 << 24) /* Read or Write operation */
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#define U2DOTGUCR_ADDR (0x3f << 16) /* Address of the ULPI PHY register */
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#define U2DOTGUCR_WDATA (0xff << 8) /* The data for a WRITE command */
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#define U2DOTGUCR_RDATA (0xff << 0) /* The data for a READ command */
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#define U2DP3CR (0x0034) /* U2D Port 3 Control Register */
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#define U2DP3CR_P2SS (0x3 << 8) /* Host Port 2 Serial Mode Select */
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#define U2DP3CR_P3SS (0x7 << 4) /* Host Port 3 Serial Mode Select */
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#define U2DP3CR_VPVMBEN (0x1 << 2) /* Host Port 3 Vp/Vm Block Enable */
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#define U2DP3CR_CFG (0x3 << 0) /* Host Port 3 Configuration */
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#define U2DCSR0 (0x0100) /* U2D Control/Status Register - Endpoint 0 */
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#define U2DCSR0_IPA (1 << 8) /* IN Packet Adjusted */
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#define U2DCSR0_SA (1 << 7) /* SETUP Active */
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#define U2DCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */
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#define U2DCSR0_FST (1 << 5) /* Force Stall */
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#define U2DCSR0_SST (1 << 4) /* Send Stall */
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#define U2DCSR0_DME (1 << 3) /* DMA Enable */
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#define U2DCSR0_FTF (1 << 2) /* Flush Transmit FIFO */
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#define U2DCSR0_IPR (1 << 1) /* IN Packet Ready */
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#define U2DCSR0_OPC (1 << 0) /* OUT Packet Complete */
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#define U2DCSR(x) (0x0100 + ((x) << 2)) /* U2D Control/Status Register - Endpoint x */
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#define U2DCSR_BF (1 << 10) /* Buffer Full, for OUT eps */
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#define U2DCSR_BE (1 << 10) /* Buffer Empty, for IN eps */
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#define U2DCSR_DPE (1 << 9) /* Data Packet Error, for ISO eps only */
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#define U2DCSR_FEF (1 << 8) /* Flush Endpoint FIFO */
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#define U2DCSR_SP (1 << 7) /* Short Packet Control/Status, for OUT eps only, readonly */
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#define U2DCSR_BNE (1 << 6) /* Buffer Not Empty, for OUT eps */
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#define U2DCSR_BNF (1 << 6) /* Buffer Not Full, for IN eps */
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#define U2DCSR_FST (1 << 5) /* Force STALL, write 1 set */
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#define U2DCSR_SST (1 << 4) /* Sent STALL, write 1 clear */
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#define U2DCSR_DME (1 << 3) /* DMA Enable */
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#define U2DCSR_TRN (1 << 2) /* Tx/Rx NAK, write 1 clear */
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#define U2DCSR_PC (1 << 1) /* Packet Complete, write 1 clear */
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#define U2DCSR_FS (1 << 0) /* FIFO needs Service */
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#define U2DBCR0 (0x0200) /* U2D Byte Count Register - Endpoint 0 */
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#define U2DBCR(x) (0x0200 + ((x) << 2)) /* U2D Byte Count Register - Endpoint x */
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#define U2DDR0 (0x0300) /* U2D Data Register - Endpoint 0 */
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#define U2DEPCR(x) (0x0400 + ((x) << 2)) /* U2D Configuration Register - Endpoint x */
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#define U2DEPCR_EE (1 << 0) /* Endpoint Enable */
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#define U2DEPCR_BS_MASK (0x3FE) /* Buffer Size, BS*8=FIFO size, max 8184B = 8KB */
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#define U2DSCA (0x0500) /* U2D Setup Command Address */
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#define U2DSCA_VALUE (0x0120)
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#define U2DEN0 (0x0504) /* U2D Endpoint Information Register - Endpoint 0 */
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#define U2DEN(x) (0x0504 + ((x) << 2)) /* U2D Endpoint Information Register - Endpoint x */
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/* U2DMA registers */
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#define U2DMACSR0 (0x1000) /* U2DMA Control/Status Register - Channel 0 */
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#define U2DMACSR(x) (0x1000 + ((x) << 2)) /* U2DMA Control/Status Register - Channel x */
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#define U2DMACSR_RUN (1 << 31) /* Run Bit (read / write) */
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#define U2DMACSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
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#define U2DMACSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
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#define U2DMACSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
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#define U2DMACSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
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#define U2DMACSR_RASIRQEN (1 << 23) /* Request After Cnannel Stopped Interrupt Enable */
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#define U2DMACSR_MASKRUN (1 << 22) /* Mask Run */
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#define U2DMACSR_SCEMC (3 << 18) /* System Bus Split Completion Error Message Class */
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#define U2DMACSR_SCEMI (0x1f << 13) /* System Bus Split Completion Error Message Index */
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#define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */
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#define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */
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#define U2DMACSR_REQPEND (1 << 8) /* Request Pending */
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#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */
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#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */
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#define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */
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#define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */
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#define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */
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#define U2DMACR (0x1080) /* U2DMA Control Register */
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#define U2DMAINT (0x10F0) /* U2DMA Interrupt Register */
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#define U2DMABR0 (0x1100) /* U2DMA Branch Register - Channel 0 */
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#define U2DMABR(x) (0x1100 + (x) << 2) /* U2DMA Branch Register - Channel x */
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#define U2DMADADR0 (0x1200) /* U2DMA Descriptor Address Register - Channel 0 */
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#define U2DMADADR(x) (0x1200 + (x) * 0x10) /* U2DMA Descriptor Address Register - Channel x */
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#define U2DMADADR_STOP (1U << 0)
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#define U2DMASADR0 (0x1204) /* U2DMA Source Address Register - Channel 0 */
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#define U2DMASADR(x) (0x1204 + (x) * 0x10) /* U2DMA Source Address Register - Channel x */
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#define U2DMATADR0 (0x1208) /* U2DMA Target Address Register - Channel 0 */
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#define U2DMATADR(x) (0x1208 + (x) * 0x10) /* U2DMA Target Address Register - Channel x */
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#define U2DMACMDR0 (0x120C) /* U2DMA Command Address Register - Channel 0 */
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#define U2DMACMDR(x) (0x120C + (x) * 0x10) /* U2DMA Command Address Register - Channel x */
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#define U2DMACMDR_XFRDIS (1 << 31) /* Transfer Direction */
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#define U2DMACMDR_STARTIRQEN (1 << 22) /* Start Interrupt Enable */
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#define U2DMACMDR_ENDIRQEN (1 << 21) /* End Interrupt Enable */
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#define U2DMACMDR_PACKCOMP (1 << 13) /* Packet Complete */
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#define U2DMACMDR_LEN (0x07ff) /* length mask (max = 2K - 1) */
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#endif /* __ASM_ARCH_PXA3xx_U2D_H */
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