6cb7bfebb1
Merge ppc32 and ppc64 versions of thread_info.h. They were pretty
similar already, the chief changes are:
- Instead of inline asm to implement current_thread_info(),
which needs to be different for ppc32 and ppc64, we use C with an
asm("r1") register variable. gcc turns it into the same asm as we
used to have for both platforms.
- We replace ppc32's 'local_flags' with the ppc64
'syscall_noerror' field. The noerror flag was in fact the only thing
in the local_flags field anyway, so the ppc64 approach is simpler, and
means we only need a load-immediate/store instead of load/mask/store
when clearing the flag.
- In readiness for 64k pages, when THREAD_SIZE will be less
than a page, ppc64 used kmalloc() rather than get_free_pages() to
allocate the kernel stack. With this patch we do the same for ppc32,
since there's no strong reason not to.
- For ppc64, we no longer export THREAD_SHIFT and THREAD_SIZE
via asm-offsets, thread_info.h can now be safely included in asm, as
on ppc32.
Built and booted on G4 Powerbook (ARCH=ppc and ARCH=powerpc) and
Power5 (ARCH=ppc64 and ARCH=powerpc).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
153 lines
3.9 KiB
C
153 lines
3.9 KiB
C
#ifndef _PPC_PTRACE_H
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#define _PPC_PTRACE_H
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/*
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* This struct defines the way the registers are stored on the
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* kernel stack during a system call or other kernel entry.
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*
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* this should only contain volatile regs
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* since we can keep non-volatile in the thread_struct
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* should set this up when only volatiles are saved
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* by intr code.
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*
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* Since this is going on the stack, *CARE MUST BE TAKEN* to insure
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* that the overall structure is a multiple of 16 bytes in length.
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*
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* Note that the offsets of the fields in this struct correspond with
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* the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c.
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*/
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#ifndef __ASSEMBLY__
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struct pt_regs {
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unsigned long gpr[32];
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unsigned long nip;
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unsigned long msr;
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unsigned long orig_gpr3; /* Used for restarting system calls */
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unsigned long ctr;
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unsigned long link;
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unsigned long xer;
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unsigned long ccr;
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unsigned long mq; /* 601 only (not used at present) */
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/* Used on APUS to hold IPL value. */
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unsigned long trap; /* Reason for being here */
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/* N.B. for critical exceptions on 4xx, the dar and dsisr
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fields are overloaded to hold srr0 and srr1. */
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unsigned long dar; /* Fault registers */
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unsigned long dsisr; /* on 4xx/Book-E used for ESR */
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unsigned long result; /* Result of a system call */
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};
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#endif /* __ASSEMBLY__ */
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#ifdef __KERNEL__
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#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
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/* Size of stack frame allocated when calling signal handler. */
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#define __SIGNAL_FRAMESIZE 64
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#ifndef __ASSEMBLY__
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#define instruction_pointer(regs) ((regs)->nip)
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *regs);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
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#define force_successful_syscall_return() \
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do { \
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current_thread_info()->syscall_noerror = 1; \
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} while(0)
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/*
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* We use the least-significant bit of the trap field to indicate
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* whether we have saved the full set of registers, or only a
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* partial set. A 1 there means the partial set.
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* On 4xx we use the next bit to indicate whether the exception
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* is a critical exception (1 means it is).
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*/
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#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
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#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
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#define TRAP(regs) ((regs)->trap & ~0xF)
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#define CHECK_FULL_REGS(regs) \
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do { \
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if ((regs)->trap & 1) \
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printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
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} while (0)
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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/*
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* Offsets used by 'ptrace' system call interface.
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* These can't be changed without breaking binary compatibility
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* with MkLinux, etc.
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*/
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#define PT_R0 0
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#define PT_R1 1
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#define PT_R2 2
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#define PT_R3 3
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#define PT_R4 4
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#define PT_R5 5
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#define PT_R6 6
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#define PT_R7 7
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#define PT_R8 8
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#define PT_R9 9
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#define PT_R10 10
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#define PT_R11 11
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#define PT_R12 12
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#define PT_R13 13
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#define PT_R14 14
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#define PT_R15 15
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#define PT_R16 16
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#define PT_R17 17
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#define PT_R18 18
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#define PT_R19 19
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#define PT_R20 20
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#define PT_R21 21
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#define PT_R22 22
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#define PT_R23 23
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#define PT_R24 24
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#define PT_R25 25
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#define PT_R26 26
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#define PT_R27 27
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#define PT_R28 28
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#define PT_R29 29
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#define PT_R30 30
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#define PT_R31 31
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#define PT_NIP 32
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#define PT_MSR 33
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#ifdef __KERNEL__
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#define PT_ORIG_R3 34
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#endif
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#define PT_CTR 35
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#define PT_LNK 36
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#define PT_XER 37
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#define PT_CCR 38
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#define PT_MQ 39
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#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
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#define PT_FPR31 (PT_FPR0 + 2*31)
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#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
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/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
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#define PTRACE_GETVRREGS 18
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#define PTRACE_SETVRREGS 19
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/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
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* spefscr, in one go */
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#define PTRACE_GETEVRREGS 20
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#define PTRACE_SETEVRREGS 21
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/*
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* Get or set a debug register. The first 16 are DABR registers and the
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* second 16 are IABR registers.
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*/
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#define PTRACE_GET_DEBUGREG 25
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#define PTRACE_SET_DEBUGREG 26
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#endif
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