Giuseppe CAVALLARO a4886d522e net/phy: extra delay only for RGMII interfaces for IC+ IP 1001 ... The extra delay of 2ns to adjust RX clock phase is actually needed in RGMII mode. Tested on the HDK7108 (STx7108c2). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2011-10-18 23:50:02 -04:00
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bcm63xx.c
broadcom.c
cicada.c
davicom.c
dp83640_reg.h	ptp: Added a clock driver for the National Semiconductor PHYTER.	2011-05-23 13:10:23 -07:00
dp83640.c	Merge branch 'master' of github.com:davem330/net	2011-10-07 13:38:43 -04:00
et1011c.c
fixed.c
icplus.c	net/phy: extra delay only for RGMII interfaces for IC+ IP 1001	2011-10-18 23:50:02 -04:00
Kconfig	drivers/net: Kconfig & Makefile cleanup	2011-08-27 00:58:49 -07:00
lxt.c
Makefile	ptp: Added a clock driver for the National Semiconductor PHYTER.	2011-05-23 13:10:23 -07:00
marvell.c
mdio_bus.c
mdio-bitbang.c
mdio-gpio.c
mdio-octeon.c
micrel.c
national.c	net/phy: fix DP83865 phy interrupt handler	2011-08-26 12:48:24 -04:00
phy_device.c	netdev/phy: Use mdiobus_read() so that proper locks are taken.	2011-09-30 18:54:08 -04:00
phy.c	atomic: use <linux/atomic.h>	2011-07-26 16:49:47 -07:00
qsemi.c
realtek.c
smsc.c
ste10Xp.c
vitesse.c