a0607fd3a2
Not as fancy as coccinelle. Checkpatch errors ignored.
Compile tested allyesconfig x86, not all files compiled.
grep -rPl --include=*.[ch] "\brequest_irq\s*\([^,\)]+,\s*\&" drivers/net | while read file ; do \
perl -i -e 'local $/; while (<>) { s@(\brequest_irq\s*\([^,\)]+,\s*)\&@\1@g ; print ; }' $file ;\
done
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
569 lines
14 KiB
C
569 lines
14 KiB
C
/*
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* SDL Inc. RISCom/N2 synchronous serial card driver for Linux
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*
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* Copyright (C) 1998-2003 Krzysztof Halasa <khc@pm.waw.pl>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License
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* as published by the Free Software Foundation.
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*
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* For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
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*
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* Note: integrated CSU/DSU/DDS are not supported by this driver
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*
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* Sources of information:
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* Hitachi HD64570 SCA User's Manual
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* SDL Inc. PPP/HDLC/CISCO driver
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/capability.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/fcntl.h>
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#include <linux/in.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/moduleparam.h>
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#include <linux/netdevice.h>
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#include <linux/hdlc.h>
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#include <asm/io.h>
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#include "hd64570.h"
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static const char* version = "SDL RISCom/N2 driver version: 1.15";
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static const char* devname = "RISCom/N2";
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#undef DEBUG_PKT
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#define DEBUG_RINGS
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#define USE_WINDOWSIZE 16384
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#define USE_BUS16BITS 1
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#define CLOCK_BASE 9830400 /* 9.8304 MHz */
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#define MAX_PAGES 16 /* 16 RAM pages at max */
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#define MAX_RAM_SIZE 0x80000 /* 512 KB */
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#if MAX_RAM_SIZE > MAX_PAGES * USE_WINDOWSIZE
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#undef MAX_RAM_SIZE
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#define MAX_RAM_SIZE (MAX_PAGES * USE_WINDOWSIZE)
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#endif
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#define N2_IOPORTS 0x10
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#define NEED_DETECT_RAM
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#define NEED_SCA_MSCI_INTR
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#define MAX_TX_BUFFERS 10
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static char *hw; /* pointer to hw=xxx command line string */
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/* RISCom/N2 Board Registers */
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/* PC Control Register */
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#define N2_PCR 0
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#define PCR_RUNSCA 1 /* Run 64570 */
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#define PCR_VPM 2 /* Enable VPM - needed if using RAM above 1 MB */
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#define PCR_ENWIN 4 /* Open window */
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#define PCR_BUS16 8 /* 16-bit bus */
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/* Memory Base Address Register */
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#define N2_BAR 2
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/* Page Scan Register */
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#define N2_PSR 4
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#define WIN16K 0x00
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#define WIN32K 0x20
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#define WIN64K 0x40
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#define PSR_WINBITS 0x60
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#define PSR_DMAEN 0x80
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#define PSR_PAGEBITS 0x0F
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/* Modem Control Reg */
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#define N2_MCR 6
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#define CLOCK_OUT_PORT1 0x80
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#define CLOCK_OUT_PORT0 0x40
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#define TX422_PORT1 0x20
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#define TX422_PORT0 0x10
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#define DSR_PORT1 0x08
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#define DSR_PORT0 0x04
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#define DTR_PORT1 0x02
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#define DTR_PORT0 0x01
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typedef struct port_s {
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struct net_device *dev;
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struct card_s *card;
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spinlock_t lock; /* TX lock */
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sync_serial_settings settings;
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int valid; /* port enabled */
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int rxpart; /* partial frame received, next frame invalid*/
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unsigned short encoding;
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unsigned short parity;
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u16 rxin; /* rx ring buffer 'in' pointer */
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u16 txin; /* tx ring buffer 'in' and 'last' pointers */
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u16 txlast;
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u8 rxs, txs, tmc; /* SCA registers */
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u8 phy_node; /* physical port # - 0 or 1 */
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u8 log_node; /* logical port # */
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}port_t;
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typedef struct card_s {
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u8 __iomem *winbase; /* ISA window base address */
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u32 phy_winbase; /* ISA physical base address */
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u32 ram_size; /* number of bytes */
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u16 io; /* IO Base address */
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u16 buff_offset; /* offset of first buffer of first channel */
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u16 rx_ring_buffers; /* number of buffers in a ring */
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u16 tx_ring_buffers;
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u8 irq; /* IRQ (3-15) */
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port_t ports[2];
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struct card_s *next_card;
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}card_t;
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static card_t *first_card;
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static card_t **new_card = &first_card;
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#define sca_reg(reg, card) (0x8000 | (card)->io | \
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((reg) & 0x0F) | (((reg) & 0xF0) << 6))
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#define sca_in(reg, card) inb(sca_reg(reg, card))
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#define sca_out(value, reg, card) outb(value, sca_reg(reg, card))
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#define sca_inw(reg, card) inw(sca_reg(reg, card))
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#define sca_outw(value, reg, card) outw(value, sca_reg(reg, card))
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#define port_to_card(port) ((port)->card)
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#define log_node(port) ((port)->log_node)
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#define phy_node(port) ((port)->phy_node)
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#define winsize(card) (USE_WINDOWSIZE)
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#define winbase(card) ((card)->winbase)
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#define get_port(card, port) ((card)->ports[port].valid ? \
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&(card)->ports[port] : NULL)
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static __inline__ u8 sca_get_page(card_t *card)
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{
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return inb(card->io + N2_PSR) & PSR_PAGEBITS;
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}
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static __inline__ void openwin(card_t *card, u8 page)
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{
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u8 psr = inb(card->io + N2_PSR);
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outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR);
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}
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#include "hd64570.c"
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static void n2_set_iface(port_t *port)
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{
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card_t *card = port->card;
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int io = card->io;
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u8 mcr = inb(io + N2_MCR);
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u8 msci = get_msci(port);
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u8 rxs = port->rxs & CLK_BRG_MASK;
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u8 txs = port->txs & CLK_BRG_MASK;
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switch(port->settings.clock_type) {
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case CLOCK_INT:
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mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
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rxs |= CLK_BRG_RX; /* BRG output */
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txs |= CLK_RXCLK_TX; /* RX clock */
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break;
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case CLOCK_TXINT:
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mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
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rxs |= CLK_LINE_RX; /* RXC input */
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txs |= CLK_BRG_TX; /* BRG output */
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break;
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case CLOCK_TXFROMRX:
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mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
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rxs |= CLK_LINE_RX; /* RXC input */
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txs |= CLK_RXCLK_TX; /* RX clock */
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break;
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default: /* Clock EXTernal */
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mcr &= port->phy_node ? ~CLOCK_OUT_PORT1 : ~CLOCK_OUT_PORT0;
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rxs |= CLK_LINE_RX; /* RXC input */
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txs |= CLK_LINE_TX; /* TXC input */
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}
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outb(mcr, io + N2_MCR);
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port->rxs = rxs;
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port->txs = txs;
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sca_out(rxs, msci + RXS, card);
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sca_out(txs, msci + TXS, card);
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sca_set_port(port);
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}
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static int n2_open(struct net_device *dev)
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{
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port_t *port = dev_to_port(dev);
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int io = port->card->io;
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u8 mcr = inb(io + N2_MCR) | (port->phy_node ? TX422_PORT1:TX422_PORT0);
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int result;
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result = hdlc_open(dev);
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if (result)
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return result;
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mcr &= port->phy_node ? ~DTR_PORT1 : ~DTR_PORT0; /* set DTR ON */
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outb(mcr, io + N2_MCR);
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outb(inb(io + N2_PCR) | PCR_ENWIN, io + N2_PCR); /* open window */
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outb(inb(io + N2_PSR) | PSR_DMAEN, io + N2_PSR); /* enable dma */
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sca_open(dev);
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n2_set_iface(port);
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return 0;
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}
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static int n2_close(struct net_device *dev)
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{
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port_t *port = dev_to_port(dev);
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int io = port->card->io;
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u8 mcr = inb(io+N2_MCR) | (port->phy_node ? TX422_PORT1 : TX422_PORT0);
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sca_close(dev);
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mcr |= port->phy_node ? DTR_PORT1 : DTR_PORT0; /* set DTR OFF */
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outb(mcr, io + N2_MCR);
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hdlc_close(dev);
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return 0;
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}
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static int n2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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{
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const size_t size = sizeof(sync_serial_settings);
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sync_serial_settings new_line;
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sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
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port_t *port = dev_to_port(dev);
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#ifdef DEBUG_RINGS
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if (cmd == SIOCDEVPRIVATE) {
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sca_dump_rings(dev);
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return 0;
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}
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#endif
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if (cmd != SIOCWANDEV)
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return hdlc_ioctl(dev, ifr, cmd);
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switch(ifr->ifr_settings.type) {
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case IF_GET_IFACE:
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ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
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if (ifr->ifr_settings.size < size) {
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ifr->ifr_settings.size = size; /* data size wanted */
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return -ENOBUFS;
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}
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if (copy_to_user(line, &port->settings, size))
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return -EFAULT;
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return 0;
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case IF_IFACE_SYNC_SERIAL:
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if(!capable(CAP_NET_ADMIN))
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return -EPERM;
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if (copy_from_user(&new_line, line, size))
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return -EFAULT;
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if (new_line.clock_type != CLOCK_EXT &&
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new_line.clock_type != CLOCK_TXFROMRX &&
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new_line.clock_type != CLOCK_INT &&
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new_line.clock_type != CLOCK_TXINT)
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return -EINVAL; /* No such clock setting */
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if (new_line.loopback != 0 && new_line.loopback != 1)
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return -EINVAL;
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memcpy(&port->settings, &new_line, size); /* Update settings */
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n2_set_iface(port);
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return 0;
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default:
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return hdlc_ioctl(dev, ifr, cmd);
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}
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}
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static void n2_destroy_card(card_t *card)
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{
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int cnt;
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for (cnt = 0; cnt < 2; cnt++)
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if (card->ports[cnt].card) {
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struct net_device *dev = port_to_dev(&card->ports[cnt]);
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unregister_hdlc_device(dev);
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}
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if (card->irq)
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free_irq(card->irq, card);
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if (card->winbase) {
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iounmap(card->winbase);
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release_mem_region(card->phy_winbase, USE_WINDOWSIZE);
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}
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if (card->io)
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release_region(card->io, N2_IOPORTS);
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if (card->ports[0].dev)
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free_netdev(card->ports[0].dev);
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if (card->ports[1].dev)
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free_netdev(card->ports[1].dev);
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kfree(card);
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}
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static const struct net_device_ops n2_ops = {
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.ndo_open = n2_open,
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.ndo_stop = n2_close,
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.ndo_change_mtu = hdlc_change_mtu,
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.ndo_start_xmit = hdlc_start_xmit,
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.ndo_do_ioctl = n2_ioctl,
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};
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static int __init n2_run(unsigned long io, unsigned long irq,
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unsigned long winbase, long valid0, long valid1)
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{
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card_t *card;
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u8 cnt, pcr;
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int i;
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if (io < 0x200 || io > 0x3FF || (io % N2_IOPORTS) != 0) {
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printk(KERN_ERR "n2: invalid I/O port value\n");
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return -ENODEV;
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}
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if (irq < 3 || irq > 15 || irq == 6) /* FIXME */ {
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printk(KERN_ERR "n2: invalid IRQ value\n");
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return -ENODEV;
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}
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if (winbase < 0xA0000 || winbase > 0xFFFFF || (winbase & 0xFFF) != 0) {
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printk(KERN_ERR "n2: invalid RAM value\n");
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return -ENODEV;
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}
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card = kzalloc(sizeof(card_t), GFP_KERNEL);
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if (card == NULL) {
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printk(KERN_ERR "n2: unable to allocate memory\n");
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return -ENOBUFS;
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}
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card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
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card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
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if (!card->ports[0].dev || !card->ports[1].dev) {
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printk(KERN_ERR "n2: unable to allocate memory\n");
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n2_destroy_card(card);
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return -ENOMEM;
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}
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if (!request_region(io, N2_IOPORTS, devname)) {
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printk(KERN_ERR "n2: I/O port region in use\n");
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n2_destroy_card(card);
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return -EBUSY;
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}
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card->io = io;
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if (request_irq(irq, sca_intr, 0, devname, card)) {
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printk(KERN_ERR "n2: could not allocate IRQ\n");
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n2_destroy_card(card);
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return(-EBUSY);
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}
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card->irq = irq;
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if (!request_mem_region(winbase, USE_WINDOWSIZE, devname)) {
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printk(KERN_ERR "n2: could not request RAM window\n");
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n2_destroy_card(card);
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return(-EBUSY);
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}
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card->phy_winbase = winbase;
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card->winbase = ioremap(winbase, USE_WINDOWSIZE);
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if (!card->winbase) {
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printk(KERN_ERR "n2: ioremap() failed\n");
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n2_destroy_card(card);
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return -EFAULT;
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}
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outb(0, io + N2_PCR);
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outb(winbase >> 12, io + N2_BAR);
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switch (USE_WINDOWSIZE) {
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case 16384:
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outb(WIN16K, io + N2_PSR);
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break;
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|
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case 32768:
|
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outb(WIN32K, io + N2_PSR);
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break;
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|
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case 65536:
|
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outb(WIN64K, io + N2_PSR);
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break;
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|
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default:
|
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printk(KERN_ERR "n2: invalid window size\n");
|
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n2_destroy_card(card);
|
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return -ENODEV;
|
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}
|
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|
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pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0);
|
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outb(pcr, io + N2_PCR);
|
|
|
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card->ram_size = sca_detect_ram(card, card->winbase, MAX_RAM_SIZE);
|
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|
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/* number of TX + RX buffers for one port */
|
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i = card->ram_size / ((valid0 + valid1) * (sizeof(pkt_desc) +
|
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HDLC_MAX_MRU));
|
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|
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card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
|
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card->rx_ring_buffers = i - card->tx_ring_buffers;
|
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|
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card->buff_offset = (valid0 + valid1) * sizeof(pkt_desc) *
|
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(card->tx_ring_buffers + card->rx_ring_buffers);
|
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|
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printk(KERN_INFO "n2: RISCom/N2 %u KB RAM, IRQ%u, "
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"using %u TX + %u RX packets rings\n", card->ram_size / 1024,
|
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card->irq, card->tx_ring_buffers, card->rx_ring_buffers);
|
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|
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if (card->tx_ring_buffers < 1) {
|
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printk(KERN_ERR "n2: RAM test failed\n");
|
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n2_destroy_card(card);
|
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return -EIO;
|
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}
|
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|
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pcr |= PCR_RUNSCA; /* run SCA */
|
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outb(pcr, io + N2_PCR);
|
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outb(0, io + N2_MCR);
|
|
|
|
sca_init(card, 0);
|
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for (cnt = 0; cnt < 2; cnt++) {
|
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port_t *port = &card->ports[cnt];
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struct net_device *dev = port_to_dev(port);
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hdlc_device *hdlc = dev_to_hdlc(dev);
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|
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if ((cnt == 0 && !valid0) || (cnt == 1 && !valid1))
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continue;
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|
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port->phy_node = cnt;
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port->valid = 1;
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|
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if ((cnt == 1) && valid0)
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port->log_node = 1;
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|
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spin_lock_init(&port->lock);
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dev->irq = irq;
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dev->mem_start = winbase;
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dev->mem_end = winbase + USE_WINDOWSIZE - 1;
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dev->tx_queue_len = 50;
|
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dev->netdev_ops = &n2_ops;
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hdlc->attach = sca_attach;
|
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hdlc->xmit = sca_xmit;
|
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port->settings.clock_type = CLOCK_EXT;
|
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port->card = card;
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|
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if (register_hdlc_device(dev)) {
|
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printk(KERN_WARNING "n2: unable to register hdlc "
|
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"device\n");
|
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port->card = NULL;
|
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n2_destroy_card(card);
|
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return -ENOBUFS;
|
|
}
|
|
sca_init_port(port); /* Set up SCA memory */
|
|
|
|
printk(KERN_INFO "%s: RISCom/N2 node %d\n",
|
|
dev->name, port->phy_node);
|
|
}
|
|
|
|
*new_card = card;
|
|
new_card = &card->next_card;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
static int __init n2_init(void)
|
|
{
|
|
if (hw==NULL) {
|
|
#ifdef MODULE
|
|
printk(KERN_INFO "n2: no card initialized\n");
|
|
#endif
|
|
return -EINVAL; /* no parameters specified, abort */
|
|
}
|
|
|
|
printk(KERN_INFO "%s\n", version);
|
|
|
|
do {
|
|
unsigned long io, irq, ram;
|
|
long valid[2] = { 0, 0 }; /* Default = both ports disabled */
|
|
|
|
io = simple_strtoul(hw, &hw, 0);
|
|
|
|
if (*hw++ != ',')
|
|
break;
|
|
irq = simple_strtoul(hw, &hw, 0);
|
|
|
|
if (*hw++ != ',')
|
|
break;
|
|
ram = simple_strtoul(hw, &hw, 0);
|
|
|
|
if (*hw++ != ',')
|
|
break;
|
|
while(1) {
|
|
if (*hw == '0' && !valid[0])
|
|
valid[0] = 1; /* Port 0 enabled */
|
|
else if (*hw == '1' && !valid[1])
|
|
valid[1] = 1; /* Port 1 enabled */
|
|
else
|
|
break;
|
|
hw++;
|
|
}
|
|
|
|
if (!valid[0] && !valid[1])
|
|
break; /* at least one port must be used */
|
|
|
|
if (*hw == ':' || *hw == '\x0')
|
|
n2_run(io, irq, ram, valid[0], valid[1]);
|
|
|
|
if (*hw == '\x0')
|
|
return first_card ? 0 : -EINVAL;
|
|
}while(*hw++ == ':');
|
|
|
|
printk(KERN_ERR "n2: invalid hardware parameters\n");
|
|
return first_card ? 0 : -EINVAL;
|
|
}
|
|
|
|
|
|
static void __exit n2_cleanup(void)
|
|
{
|
|
card_t *card = first_card;
|
|
|
|
while (card) {
|
|
card_t *ptr = card;
|
|
card = card->next_card;
|
|
n2_destroy_card(ptr);
|
|
}
|
|
}
|
|
|
|
|
|
module_init(n2_init);
|
|
module_exit(n2_cleanup);
|
|
|
|
MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
|
|
MODULE_DESCRIPTION("RISCom/N2 serial port driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
module_param(hw, charp, 0444);
|
|
MODULE_PARM_DESC(hw, "io,irq,ram,ports:io,irq,...");
|